ISL6563

FN9126 Rev 8.00

Page 17 of 20

Jun 10, 2010

High frequency decoupling capacitors should be placed as

close to the power pins of the load, or for that reason, to any

decoupling target they are meant for, as physically possible.

Attention should be paid as not to add inductance in the

circuit board wiring that could cancel the usefulness of these

low inductance components. Consult with the manufacturer

of the load on specific decoupling requirements.

Use only specialized low-ESR capacitors intended for

switching-regulator applications for the bulk capacitors. The

bulk capacitor’s ESR determines the output ripple voltage

and the initial voltage drop following a high slew-rate

transient’s edge. In most cases, multiple capacitors of small

case size perform better than a single large case capacitor.

Bulk capacitor choices include aluminum electrolytic, OS-Con,

Tantalum and even ceramic dielectrics. An aluminum

electrolytic capacitor’s ESR value is related to the case size

with lower ESR available in larger case sizes. However, the

equivalent series inductance (ESL) of these capacitors

increases with case size and can reduce the usefulness of the

capacitor to high slew-rate transient loading. Unfortunately,

ESL is not a specified parameter. Consult the capacitor

manufacturer and/or measure the capacitor’s impedance with

frequency to help select a suitable component.

Output Inductor Selection

One of the parameters limiting the converter’s response to a

load transient is the time required to change the inductor

current. In a multiphase converter, small inductors reduce

the response time with less impact to the total output ripple

current (as compared to single-phase converters).

VIA CONNECTION TO GROUND PLANE

ISLAND ON POWER PLANE LAYER

ISLAND ON CIRCUIT PLANE LAYER

KEY

LOCATE CLOSE TO IC

FIGURE 9. PRINTED CIRCUIT BOARD POWER PLANES AND ISLANDS

LOCATE NEAR LOAD;

(MINIMIZE CONNECTION PATH)

ISL6563

Q1

Q2

Q3

Q4

VID4

VID3

VID2

VID1

VID0

COMP

FB

GND

VCC

BOOT1

BOOT2

UGATE1

UGATE2

ISEN

LGATE1

LGATE2

PHASE1

PHASE2

PGND

PVCC

DACSEL/VID12

VRM10

SSEND

ENLL

OFS

HEAVY TRACE ON CIRCUIT PLANE LAYER

LOCATE NEAR SWITCHING TRANSISTORS;

(MINIMIZE CONNECTION PATH)

(MINIMIZE CONNECTION PATH)