ISL9491, ISL9491A

FN6531 Rev 1.00

Page 2 of 14

August 12, 2015

Functional Pin Description

SYMBOL

FUNCTION

VSW

Input of the linear post-regulator.

PGND

Dedicated ground for the output gate driver of respective PWM.

CS

FET.

SGND

Small signal ground for the IC.

TCAP

Capacitor for setting rise and fall time of the output voltage. Typical value is 0.1µF.

BYPASS

Connect a bypass capacitor of 1µF for the internal 5V.

VCC

Main power supply to the chip.

GATE

This pin connects to the Gate of the Boost FET.

VOUT

Output voltage for the LNB meant to be connected to the anode of a back diode in series with the LNB output.

VSENSE

This pin provides for a sensing and pull-down function for the VLNB and is meant to be connected to the cathode

of the back diode.

EXTM

This is an input for externally modulated DiSEqC tone signal, which is transferred symmetrically onto VLNB.

VSET0,

VSET1

Output voltage selection pins.

EN

When this pin is low, the output is disabled in a low power standby state. Setting EN = 1 enables the output

voltage.

FAULT

This an open drain output to be pulled up to the logic high through a resistor. A low indicates that the output

voltage is out of regulation.

ILIMIT

The ILIMIT is used to set the value of the output current limit from the linear. A resistor from ILIMIT to GND

programs this limit.