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ISL68147IRAZ 데이터시트(PDF) 21 Page - Renesas Technology Corp

부품명 ISL68147IRAZ
상세설명  Digital Dual Output, 7-Phase Configurable, PWM Controller with PMBus for Cavium
PDF  47 Pages
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제조업체  RENESAS [Renesas Technology Corp]
홈페이지  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

ISL68147IRAZ 데이터시트(HTML) 21 Page - Renesas Technology Corp

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ISL68147
FN8880 Rev.2.00
Page 21 of 47
Jul 14, 2017
PMBus Protocol
S
Slave Address_0
1
7 + 1
Command Code
1
8
Low Data Byte
High Data Byte
PEC
A
1
8
A
1
8
A
1
8
A
1
A
1
P
S
Slave Address_0
7 + 1
Command Code
1
8
A
1
A
PEC
8
1
A
1
P
Optional 9 bits for SMBus/PMBus
1. Send Byte Protocol
2. Write Byte/Word Protocol
S
Slave Address_0
1
7 + 1
Command Code
1
8
A
1
8
A
1
8
A
1
8
A
1
N
1
P
3. Read Byte/Word Protocol
RS
Slave Address_1
1
7 + 1
Example command: 03h Clear Faults
Example command: 21h VOUT_COMMAND
NOT used in I2C
Optional 9 Bits for SMBus/PMBus
NOT used in I2C
Optional 9 bits for SMBus/PMBus
NOT used in I2C
Example command: 8B READ_VOUT (Two words, read voltage of the selected rail).
S: Start Condition
A: Acknowledge (“0”)
N: Not Acknowledge (“1”)
RS: Repeated Start Condition
P: Stop Condition
PEC: Packet Error Checking
R: Read (“1”)
W: Write (“0”)
5. Alert Response Address (ARA, 0001_1001, 25h) for SMBus and PMBus, not used for I2C
S
ALERT Addr_1
1
7 + 1
1
7+1
A
1
A
8
1
A
1
P
Optional 9 bits for SMBus/PMBus
NOT used in I2C
1
A
Data Byte
PEC
8
1
8
1
A
4. Group Command Protocol - No more than one command can be sent to the same Address
S
Slave ADDR2_0
1
7 + 1
1
A
S
Slave ADDR1_0
1
7 + 1
Command Code
1
8
Low Data Byte
High Data Byte
PEC
A
1
8
A
1
8
A
1
8
A
1
A
Low Data Byte
High Data Byte
PEC
8
1
8
A
1
8
A
1
A
1
P
RS
Slave ADDR3_0
1
7 + 1
Optional 9 bits for SMBus/PMBus
1
A
NOT used in I2C
Not Used for 1-byte Word Read
Not Used for 1-byte Word
Slave_Address_1
PEC
Low Data Byte
High Data Byte
PEC
Command Code
8
1
A
Command Code
8
A
(This will clear all of the bits in Status Byte for the selected rail)
Acknowledge or DATA from Slave,
ISL68147 Controller
STOP (P) bit is NOT allowed before the repeated START condition when “reading” contents of a register.
A



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