ADL5511ACPZ-R7 datasheet(24/29 Pages) AD

24 / 29 page

ADL5511

Data Sheet

Rev. C | Page 24 of 29

ERROR VS. FREQUENCY

Figure 57 and Figure 58 show how the VRMS and VENV output

voltages and error vary with input frequency when the ADL5511 is

calibrated at a single frequency. In this example, the ADL5511

has been calibrated at 25°C at 1.9 GHz. The plots also show how

the output voltage and error vary above and below this frequency.

Figure 57. VRMS Output vs. Frequency for a Fixed Input Power, PIN = 0 dBm,

Calibration at 1.9 GHz, 25°C

Figure 58. VENV Output vs. Frequency for a Fixed Input Power, PIN = 0 dBm,

Calibration at 1.9 GHz, 25°C

EVALUATION BOARD

Figure 59 shows the schematic of the ADL5511 evaluation board.

This 4-layer board is powered by a single supply in the 4.75 V

to 5.25 V range. The power supply is decoupled by 100 pF and

0.1 μF capacitors.

Table 5 details the various configuration options of the evaluation

board. Figure 60 and Figure 61 show the bottom side and top

side layouts, respectively.

The RF input has a broadband match of 50 Ω using a single

75 Ω resistor at R5.

The VRMS output is accessible via a clip lead (a pad is also

available where an SMA connector is installed). The VENV

output is accessible via an SMA connector. For response-

time critical measurements where stray capacitance must

be minimized, R2 can be removed and a FET probe can be

attached to JP1 (JP1 must be installed).

–6

–4

–2

100

200

400

300

500

600

1000

2000

3000

4000

5000

6000

FREQUENCY (MHz)

VRMS AT –40°C

VRMS AT +25°C

VRMS AT +85°C

ERROR AT –40°C

ERROR AT +25°C

ERROR AT +85°C

–8

–6

–4

–2

100

150

200

250

300

350

400

1000

2000

3000

4000

5000

6000

FREQUENCY (MHz)

VENV AT –40°C

VENV AT +25°C

VENV AT +85°C

ERROR AT –40°C

ERROR AT +25°C

ERROR AT +85°C

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