SH7145 datasheet(86/773 Pages) RENESAS

86 / 773 page

Rev. 2.0, 09/02, page 46 of 732

3.4

Address Map

The address map for the operating modes are shown in figure 3.1.

H'00000000

H'FFFF7FFF

H'FFFF8000

H'003FFFFF

H'007FFFFF

H'00400000

H'00800000

H'00BFFFFF

H'00C00000

H'00FFFFFF

H'01000000

H'FFFFBFFF

H'FFFFC000

Modes 0 and 1

On-chip ROM disabled mode

Modes 2

On-chip ROM enabled mode

Modes 3

Single-chip mode

On-chip RAM(8kB)

(256kB)

H'FFFFFFFF

H'FFFFDFFF

H'FFFFE000

H'00000000

H'00200000

H'FFFF7FFF

H'FFFF8000

H'003FFFFF

H'0003FFFF

H'007FFFFF

H'00400000

H'00040000

H'00800000

H'00BFFFFF

H'00C00000

H'00FFFFFF

H'01000000

H'FFFFBFFF

H'FFFFC000

H'FFFFFFFF

H'FFFFDFFF

H'FFFFE000

H'FFFF7FFF

H'FFFF8000

H'FFFFBFFF

H'FFFFC000

H'FFFFFFFF

H'FFFFDFFF

H'FFFFE000

H'00000000

H'0003FFFF

On-chip ROM

Reserved area

CS0 area

CS1 area

CS2 area

CS3 area

CS1 area

CS2 area

CS3 area

CS0 area

Reserved area

On-chip peripheral

I/O registers

On-chip peripheral

I/O registers

On-chip peripheral

I/O registers

Reserved area

On-chip ROM

Figure 3.1 The Address Map for Each Operating Mode

3.5

Initial State in This LSI

In the initial state of this LSI, some of on-chip modules are set in module standby state for saving

power.

When operating these modules, clear module standby state according to the procedure in section

24, Power-Down Modes.

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