| 전자부품 데이터시트 검색엔진 |
|
AD5424 데이터시트(PDF) 6 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
AD5424 데이터시트(HTML) 6 Page - Analog Devices |
|
6 / 24 page ![]() REV. 0 –6– AD5424/AD5433/AD5445 TSSOP AD5424 (Not to Scale) IOUT1 IOUT2 GND DB7 DB6 1 2 3 4 5 16 9 10 DB1 DB2 RFB DB5 DB4 DB3 6 7 8 11 12 13 14 15 VREF VDD R/ W CS DB0 (LSB) LFCSP PIN 1 INDICATOR TOP VIEW AD5424 1 GND 2 DB7 3 DB6 4 DB5 5 DB4 15 R/ W 14 CS 13 NC 12 NC 11 NC NC = NO CONNECT PIN CONFIGURATIONS AD5424 PIN FUNCTION DESCRIPTIONS Pin No. TSSOP LFCSP Mnemonic Function 119 IOUT1 DAC Current Output. 220 IOUT2 DAC Analog Ground. This pin should normally be tied to the analog ground of the system. 31 GND Ground 4–11 2–9 DB7–DB0 Parallel Data Bits 7 to 0. 10–13 NC No Internal Connection. 12 14 CS Chip Select Input. Active low. Used in conjunction with R/ W to load parallel data to the input latch or to read data from the DAC register. Rising edge of CS loads data. 13 15 R/ W Read/Write. When low, used in conjunction with CS to load parallel data. When high, use with CS to readback contents of DAC register. 14 16 VDD Positive Power Supply Input. These parts can be operated from a supply of 2.5 V to 5.5 V. 15 17 VREF DAC Reference Voltage Input Terminal. 16 18 RFB DAC Feedback Resistor Pin. Establish voltage output for the DAC by connecting to external amplifier output. |
|
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |