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LTC1743CFW 데이터시트(PDF) 2 Page - Linear Technology

부품명 LTC1743CFW
상세설명  12-Bit, 50Msps ADC
PDF  24 Pages
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제조업체  LINER [Linear Technology]
홈페이지  http://www.linear.com
Logo LINER - Linear Technology

LTC1743CFW 데이터시트(HTML) 2 Page - Linear Technology

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LTC1743
1743f
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Resolution (No Missing Codes)
q
12
Bits
Integral Linearity Error
(Note 6)
q
–1
±0.4
1
LSB
Differential Linearity Error
q
–0.8
±0.2
0.8
LSB
Offset Error
(Note 7)
– 20
±520
mV
Gain Error
External Reference (SENSE = 1.6V)
– 3
±1
3
%FS
Full-Scale Tempco
IOUT(REF) = 0
±40
ppm/
°C
ORDER PART
NUMBER
OVDD = VDD (Notes 1, 2)
Supply Voltage (VDD) ................................................ 6V
Analog Input Voltage (Note 3) .... – 0.3V to (VDD + 0.3V)
Digital Input Voltage (Note 4) ..... – 0.3V to (VDD + 0.3V)
Digital Output Voltage ................. – 0.3V to (VDD + 0.3V)
OGND Voltage .............................................. – 0.3V to 1V
Power Dissipation ............................................ 2000mW
Operating Temperature Range
LTC1743C ............................................... 0
°C to 70°C
LTC1743I ............................................ – 40
°C to 85°C
Storage Temperature Range ................. – 65
°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300
°C
LTC1743CFW
LTC1743IFW
TJMAX = 150°C, θJA = 35°C/W
Consult LTC Marketing for parts specified with wider operating temperature ranges.
The q indicates specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. (Note 5)
ABSOLUTE MAXIMUM RATINGS
PACKAGE/ORDER INFORMATION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
TOP VIEW
FW PACKAGE
48-LEAD PLASTIC TSSOP
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
SENSE
VCM
GND
AIN
+
AIN
–
GND
VDD
VDD
GND
REFLB
REFHA
GND
GND
REFLA
REFHB
GND
VDD
VDD
GND
VDD
GND
MSBINV
ENC
ENC
OF
OGND
D11
D10
D9
OVDD
D8
D7
D6
D5
OGND
GND
GND
D4
D3
D2
OVDD
D1
D0
NC
NC
OGND
CLKOUT
OE
CO VERTER CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VIN
Analog Input Range (Note 8)
4.75V
≤ VDD ≤ 5.25V
q
±1 to ±1.6
V
IIN
Analog Input Leakage Current
q
–1
1
µA
CIN
Analog Input Capacitance
Sample Mode ENC < ENC
15
pF
Hold Mode ENC > ENC
8
pF
tACQ
Sample-and-Hold Acquisition Time
(Note 8)
q
7.5
9.5
ns
tAP
Sample-and-Hold Acquisition Delay Time
0
ns
tJITTER
Sample-and-Hold Acquisition Delay Time Jitter
0.3
psRMS
CMRR
Analog Input Common Mode Rejection Ratio
1.0V < (AIN– = AIN+) < 3.5V
80
dB
The q indicates specifications which apply over the full operating temperature range, otherwise
specifications are at TA = 25°C. (Note 5)
A ALOG I PUT



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