MP3274

8

Rev. 4.00

CS

WR

ADDRESS

Figure 1. Timing for ADC Channel Select Start Conversion

STL

ADEN

STS

DB0-DB11

RD = 0

DB0-DB11

RD = 1

HIGH Z

Previous ADC Data

New ADC Data

10

t

Table 3. ADC Read Timing

(

See Figure 2.)

25

Tmin to

Tmax

Limits

Comments/Test Conditions

CS to RD Set-Up Time

0

0

ns min

CS to RD Hold Time

0

0

ns min

RD to Data Valid Delay

100

150

ns max

Load ckt of

150

200

ns max

Load ckt of

Bus Relinquish Time after RD

100

150

ns max

Load ckt of

Figure 4.

High

RD Pulse Width

100

150

ns min

ADC Read Timing

Time

Interval

CS

RD

DATA

Figure 2. Timing for ADC Read

t

Valid

17