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ADV7482WBBCZ 데이터시트(PDF) 8 Page - Analog Devices |
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ADV7482WBBCZ 데이터시트(HTML) 8 Page - Analog Devices |
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8 / 20 page ![]() ADV7482 Data Sheet MIPI VIDEO OUTPUT SPECIFICATIONS AVDD = 1.71 V to 1.89 V, DVDD = 1.71 V to 1.89 V, PVDD = 1.71 V to 1.89 V, MVDD = 1.71 V to 1.89 V, CVDD = 1.71 V to 1.89 V, DVDDIO = 3.14 V to 3.46 V, and TVDD = 3.14 V to 3.46 V, specified at operating temperature range, unless otherwise noted. The ADV7482 MIPI CSI-2 transmitters conform to the MIPI D-PHY Version 1.00.00 specification by characterization. The clock lane of the ADV7482 remains in high speed (HS) mode even when the data lane enters low power (LP) mode. For this reason, some measurements on the clock lane that pertain to low power mode are not applicable. Unless otherwise stated, all high speed measurements were performed with the ADV7482 operating with a nominal 1 Gbps output data rate. Table 3 Parameter Symbol Min Typ Max Unit UNIT INTERVAL1 UI 1 12.5 ns DATA LANE LP Tx DC SPECIFICATIONS2 Thevenin Output High Level VOH 1.1 1.2 1.3 V Low Level VOL −50 0 +50 mV CLOCK LANE LP Tx DC SPECIFICATIONS2 Thevenin Output High Level VOH 1.1 1.2 1.3 V Low Level VOL −50 0 +50 mV DATA LANE HS Tx SIGNALING REQUIREMENTS High Speed Differential Voltage Swing |V1| 140 200 270 mV p-p Differential Voltage Mismatch 10 mV Single-Ended Output High Voltages 360 mV Static Common-Mode Voltage Level 150 200 250 mV CLOCK LANE HS Tx SIGNALING REQUIREMENTS High Speed Differential Voltage Swing |V2| 140 200 270 mV p-p Differential Voltage Mismatch 10 mV Single-Ended Output High Voltages 360 mV Static Common-Mode Voltage Level 150 200 250 mV HS Tx CLOCK TO DATA LANE TIMING REQUIREMENTS Data to Clock Skew 0.35 × UI 0.65 × UI ns 1 Guaranteed by design. 2 These measurements were performed with CLOAD = 50 pF. ANALOG SPECIFICATIONS AVDD = 1.71 V to 1.89 V, DVDD = 1.71 V to 1.89 V, PVDD = 1.71 V to 1.89 V, MVDD = 1.71 V to 1.89 V, CVDD = 1.71 V to 1.89 V, DVDDIO = 3.14 V to 3.46 V, and TVDD = 3.14 V to 3.46 V, specified at operating temperature range, unless otherwise noted. Table 4. Parameter Test Conditions/Comments Min Typ Max Unit CLAMP CIRCUITRY External Clamp Capacitor Required by design 0.1 µF Large Clamp Source Current 0.32 mA Sink Current 0.32 mA Fine Clamp Source Current 7 µA Sink Current 7 µA Rev. 0 | Page 8 of 20 |
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