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WM8591

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PP Rev 1.0 May 2005

37

REGISTER MAP

The complete register map is shown below. The detailed description can be found in the relevant text of the device description. The

WM8591 can be configured using the Control Interface. All unused bits should be set to ‘0’.

REGISTER

B

15

B

14

B

13

B

12

B

11

B

10

B

9

B8

B7

B6

B5

B4

B3

B2

B1

B0

DEFAULT

(HEX)

R3 (03h)

0

0

0

0

0

1

1 UPDATED

LDA[7:0]

0FF

R4 (04h)

0

0

0

0

1

0

0 UPDATED

RDA[7:0]

0FF

R5 (05h)

0

0

0

0

1

0

1 UPDATED

MDA[7:0]

0FF

R6 (06h)

0

0

0

0

1

1

0

0

0

0

0

0

0

0

PHASE[1:0]

000

R7 (07h)

0

0

0

0

1

1

1

0

PL[3:0]

TOD

IZD

ATC

DZCEN

090

R9 (09h)

0

0

0

1

0

0

1

0

0

0

0

ZFLAG

POL

DMUTE

DZFM [1:0]

DEEMPH

004

R10 (0Ah)

0

0

0

1

0

1

0

DACOSR

0

0

DACWL[1:0]

DACBCP

DACLRP

DACFMT[1:0]

022

R11 (0Bh)

0

0

0

1

0

1

1

ADCWL[1:0]

ADCBCP

ADCLRP

ADCFMT[1:0]

022

R12 (0Ch)

0

0

0

1

1

0

0

ADCMS

DACMS

DACRATE[2:0]

ADCOSR

ADCRATE[2:0]

122

R13 (Odh)

0

0

0

1

1

0

1

0

0

0

0

0

0

DACPD

ADCPD

PDWN

000

R14 (0Eh)

0

0

0

1

1

1

0

ZCLA

LAG[7:0]

0CF

R15 (0Fh)

0

0

0

1

1

1

1

ZCRA

RAG[7:0]

0CF

R16 (10h)

0

0

1

0

0

0

0

LCSEL[1:0]

MAXGAIN[2:0]

LCT[3:0]

1FE

R17 (11h)

0

0

1

0

0

0

1

LCMODE

ALCZC

0

0

0

0

0

0

0

180

R18 (12h)

0

0

1

0

0

1

1

0

DCY[3:0]

ATK[3:0]

092

R20 (14h)

0

0

1

0

1

0

0

0

0

0

0

0

MAXATTEN[3:0]

006

R21 (15h)

0

0

1

0

1

0

1

LRBOTH

0

0

0

0

0

0

MUTELA MUTERA

000

R23 (17h)

0

0

1

0

1

1

1

SOFTWARE RESET

not reset

R28 (1Ch)

0

0

1

1

1

0

BCLK_RATE

0

ADCSYNCEN

000