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551S 데이터시트(PDF) 8 Page - Integrated Device Technology

부품명 551S
상세설명  Low Skew 1 to 4 Clock Buffer
PDF  9 Pages
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제조업체  IDT [Integrated Device Technology]
홈페이지  http://www.idt.com
Logo IDT - Integrated Device Technology

551S 데이터시트(HTML) 8 Page - Integrated Device Technology

  551S Datasheet HTML 1Page - Integrated Device Technology 551S Datasheet HTML 2Page - Integrated Device Technology 551S Datasheet HTML 3Page - Integrated Device Technology 551S Datasheet HTML 4Page - Integrated Device Technology 551S Datasheet HTML 5Page - Integrated Device Technology 551S Datasheet HTML 6Page - Integrated Device Technology 551S Datasheet HTML 7Page - Integrated Device Technology 551S Datasheet HTML 8Page - Integrated Device Technology 551S Datasheet HTML 9Page - Integrated Device Technology  
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LOW SKEW 1 TO 4 CLOCK BUFFER
8
SEPTEMBER 20, 2018
551S DATASHEET
Package Outline Drawings
The package outline drawings are appended at the end of this document and are accessible from the link below. The package
information is the most current data available.
www.idt.com/document/psc/dcg8-package-outline-drawing-0150-body-width-0050-pitch-soic
www.idt.com/document/psc/cmg8-package-outline-drawing-20-x-20-x-05-mm-body-05mm-pitch-dfn
Ordering Information
“G” suffix to the part number denotes Pb-Free configuration, RoHS compliant.
Revision History
Part / Order Number
Marking
Shipping Packaging
Package
Temperature
551SDCGI
see page 7
Tubes
8-pin SOIC
-40 to +105
C
551SDCGI8
Tape and Reel
8-pin SOIC
-40 to +105
C
551SCMGI
Cut Tape
8-pin DFN
-40 to +105
C
551SCMGI8
Tape and Reel
8-pin DFN
-40 to +105
C
Date
Description of Change
September 20, 2018
• Added Thermal Resistance Junction to Board to Thermal Characteristics table.
• Updated Package Outline Drawings section.
March 18, 2015
Initial release.



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