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MMPF0200 데이터시트(PDF) 26 Page - NXP Semiconductors

부품명 MMPF0200
상세설명  12 channel configurable power management integrated circuit
PDF  114 Pages
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제조업체  NXP [NXP Semiconductors]
홈페이지  http://www.nxp.com
Logo NXP - NXP Semiconductors

MMPF0200 데이터시트(HTML) 26 Page - NXP Semiconductors

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NXP Semiconductors
PF0200
FUNCTIONAL BLOCK REQUIREMENTS AND BEHAVIORS
Figure 8. State diagram
To complement the state diagram in Figure 8, a description of the states is provided in following sections. Note that VIN must exceed the
rising UVDET threshold to allow a power up. Refer to Table 27 for the UVDET thresholds. Additionally, I2C control is not possible in the
Coin Cell mode and the interrupt signal, INTB, is only active in Sleep, Standby, and ON states.
6.4.1.1
ON mode
The PF0200 enters the On mode after a turn-on event. RESETBMCU is de-asserted, high, in this mode of operation.
6.4.1.2
OFF mode
The PF0200 enters the Off mode after a turn-off event. A thermal shutdown event also forces the PF0200 into the Off mode. Only
VCOREDIG and VSNVS are powered in the mode of operation. To exit the Off mode, a valid turn-on event is required. RESETBMCU is
asserted, LOW, in this mode.
6.4.1.3
Standby mode
• Depending on STANDBY pin configuration, Standby is entered when the STANDBY pin is asserted. This is typically used for low-
power mode of operation.
• When STANDBY is de-asserted, Standby mode is exited.
PWRON = 0 held >= 4.0 sec
Any SWxOMODE bits=1
& PWRONRSTEN = 1
(PWRON_CFG=1)
PWRON=1
& VIN > UVDET
(PWRON_CFG =0)
Or
PWRON= 0 < 4.0 sec
& VIN > UVDET
(PWRON_CFG=1)
ON
PWRON = 0
Any SWxOMODE bits=1
(PWRON_CFG=0)
Or
PWRON=0 held >= 4.0 sec
Any SWxOMODE bits=1
& PWRONRSTEN = 1
(PWRON_CFG=1)
PWRON=1
& VIN > UVDET
(PWRON_CFG = 0)
Or
PWRON= 0 < 4.0 sec
& VIN > UVDET
(PWRON_CFG=1)
PWRON = 0
All SWxOMODE bits= 0
(PWRON_CFG = 0)
Or
PWRON = 0 held >= 4.0 sec
All SWxOMODE bits= 0
& PWRONRSTEN = 1
(PWRON_CFG = 1)
OFF
Sleep
Coin Cell
VIN < UVDET
VIN > UVDET
Thermal shudown
Standby
STANDBY asserted
VIN < UVDET
Thermal shutdown
Thermal shutdown
STANDBY de-asserted
PWRON = 0
Any SWxOMODE bits=1
(PWRON_CFG=0)
Or
PWRON=0 held >= 4.0 sec
Any SWxOMODE bits=1
& PWRONRSTEN = 1
(PWRON_CFG=1)
PWRON = 0
All SWxOMODE bits= 0
(PWRON_CFG = 0)
Or
PWRON = 0 held >= 4.0 sec
All SWxOMODE bits= 0
& PWRONRSTEN = 1
(PWRON_CFG = 1)
VIN < UVDET
VIN < UVDET



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