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HMC6832ALP5LE 데이터시트(PDF) 11 Page - Analog Devices

부품명 HMC6832ALP5LE
상세설명  Low Noise, 2:8 Differential Fanout Buffer
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Data Sheet
HMC6832
Rev. C | Page 11 of 23
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
15
1
3
2
GND
OUTP7
OUTN7
4
5
IN_SEL
INP1
6
INN1
7
VAC_REF
NOTES
1. EXPOSED PAD. THE EXPOSED PAD MUST BE CONNECTED TO GND.
VDD
16 OUTP1
17 OUTN1
18 OUTP2
19 OUTN2
20 OUTP3
21 OUTN3
HMC6832
TOP VIEW
(Not to Scale)
Figure 3. Pin Configuration
Table 10. Pin Function Descriptions
Pin No.
Mnemonic
Description
1
GND
Ground.
2
OUTP7
Differential Signal Output 7, Positive.
3
OUTN7
Differential Signal Output 7, Negative.
4
IN_SEL
Input Select. Logic 0 = INP0/INN0 and Logic 1 = INP1/INN1.
5
INP1
Differential Signal Input 1, Positive.
6
INN1
Differential Signal Input 1, Negative.
7
VAC_REF
Output Reference Voltage.
8
VDD
Power Supply.
9
INP0
Differential Signal Input 0, Positive.
10
INN0
Differential Signal Input 0, Negative.
11
CONFIG
Output Termination Configuration Input. Logic 0 = LVPECL and Logic 1 = LVDS.
12
OUTP0
Differential Signal Output 0, Positive.
13
OUTN0
Differential Signal Output 0, Negative.
14
GND
Ground.
15
VDD
Power Supply.
16
OUTP1
Differential Signal Output 1, Positive.
17
OUTN1
Differential Signal Output 1, Negative.
18
OUTP2
Differential Signal Output 2, Positive.
19
OUTN2
Differential Signal Output 2, Negative.
20
OUTP3
Differential Signal Output 3, Positive.
21
OUTN3
Differential Signal Output 3, Negative.
22
OUTP4
Differential Signal Output 4, Positive.
23
OUTN4
Differential Signal Output 4, Negative.
24
OUTP5
Differential Signal Output 5, Positive.
25
OUTN5
Differential Signal Output 5, Negative.
26
OUTP6
Differential Signal Output 6, Positive.
27
OUTN6
Differential Signal Output 6, Negative.
28
VDD
Power Supply.
EPAD
Exposed Pad. The exposed pad must be connected to GND.



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