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ADF4155BCPZ 데이터시트(PDF) 5 Page - Analog Devices

부품명 ADF4155BCPZ
상세설명  Integer-N/Fractional-N PLL Synthesizer
PDF  32 Pages
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제조업체  AD [Analog Devices]
홈페이지  http://www.analog.com
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ADF4155BCPZ 데이터시트(HTML) 5 Page - Analog Devices

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Data Sheet
ADF4155
TIMING CHARACTERISTICS
AVDD = DVDD = RFVDD = 3.3 V ± 5%, AVDD ≤ VP ≤ 5.5V, AGND = DGND = RFGND = CPGND = 0 V, 1.8 V and 3 V logic levels used, and TA =
TMIN to TMAX, unless otherwise noted.
Table 2.
Parameter
Limit
Unit
Description
t1
20
ns min
LE setup time
t2
10
ns min
DATA to CLK setup time
t3
10
ns min
DATA to CLK hold time
t4
25
ns min
CLK high duration
t5
25
ns min
CLK low duration
t6
10
ns min
CLK to LE setup time
t7
20
ns min
LE pulse width
Timing Diagram
Figure 2. Timing Diagram
CLK
DATA
LE
DB31 (MSB)
DB30
DB1
(CONTROL BIT C2)
DB0 (LSB)
(CONTROL BIT C1)
t1
t2
t3
t7
t6
t4
t5
DB2
(CONTROL BIT C3)
DB3
(CONTROL BIT C4)
Rev. 0 | Page 5 of 32



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