74LVC3G07DP datasheet(7/14 Pages) PHILIPS

7 / 14 page

9397 750 14542

Product data sheet

Rev. 03 — 01 February 2005

7 of 14

Philips Semiconductors

74LVC3G07

Triple buffer with open-drain output

[1]

All typical values are measured at nominal VCC and Tamb = 25 °C.

[2]

CPD is used to determine the dynamic power dissipation (PD in µW).

PD =CPD × VCC2 × fi × N+ ∑(CL × VCC2 × fo) where:

fi = input frequency in MHz;

fo = output frequency in MHz;

CL = output load capacitance in pF;

VCC = supply voltage in Volts;

N = number of inputs switching;

∑(C

L × VCC

× f

o) = sum of outputs.

[3]

The condition is VI = GND to VCC.

13. Waveforms

CPD

power dissipation

capacitance per gate

VCC = 3.3 V

[2] [3] -

6.5

Tamb = −40 °C to +125 °C

tPLZ, tPZL

propagation delay

input nA to output nY

see Figure 6 and 7

VCC = 1.65 V to 1.95 V

1.0

8.4

VCC = 2.3 V to 2.7 V

0.5

5.5

VCC = 2.7 V

1.0

5.3

VCC = 3.0 V to 3.6 V

0.5

4.7

VCC = 4.5 V to 5.5 V

0.5

3.7

Table 9:

Dynamic characteristics …continued

At recommended operating conditions; voltages are referenced to GND (ground = 0 V).

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Measurement points are given in Table 10.

VOL is typical output voltage drop that occurs with the output load.

Fig 6.

The input (nA) to output (nY) propagation delays

mna528

tPLZ

nY output

nA input

VCC

VOL

GND

tPZL

74LVC3G07DP 데이터시트(PDF) 7 Page - NXP Semiconductors

74LVC3G07DP 데이터시트(HTML) 7 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14

데이터시트 다운로드

링크 URL