2

HMC4069LP4E

v02.0316

2.9 GHz INTEGER-N SYNTHESIZER

(N = 2 - 32)

For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106

Phone: 781-329-4700 • Order online at www.analog.com

Application Support: Phone: 1-800-ANALOG-D

Parameter

Conditions

Min.

Typ.

Max.

Units

REF Input Frequency

Min must be Square Wave

Max can be Sine or Square Wave

10

100

1300

MHz

VCO Input Frequency

10

2900

Input Power Range

-10

5

+5

dBm

Programmable Division Ratios (A0 - A4)

2

32

Output Voltage Swing (NU / ND)

Driving High-Z Load / Op-Amp

2

Vp-p

PFD Gain

Gain = Vpp / 2Π Rad

0.32

V / Rad

SSB Phase Noise [1]

@ 10kHz Offset

with 100 MHz REF / VCO @ +5 dBm

-151

dBc/Hz

Logic Input Voltages

(INV, A0 - A4)

CMOS / TTL Logic Low

CMOS / TTL Logic High

0.0

1.8

1.1

5.0

V

Lock Detect Output Voltage

Filtering & 1kΩ Pull-Up Required

CMOS / TTL Logic Low = Unlocked

MOS / TTL Logic High = Locked

0.0

2.7

0.5

5.0

V

Lock Detect Sink Current

5

mA

Supply Voltage (Vcc)

4.75

5.00

5.25

V

Supply Current (Icc)

Vcc = 5.0V

295

mA

Test Port Output Voltage (FOUT / NFOUT)

Driving High-Z Load Only

300

mVp-p

Temperature Range

-40

+85

°C

[1] Square wave input achieves best phase noise at lower REF/VCO frequencies (see comparison plots on preceding page)