AM652X datasheet(243/299 Pages) TI1

243 / 299 page

243

AM6548, AM6528, AM6546

AM6526, AM6527

www.ti.com

SPRSP08E – NOVEMBER 2017 – REVISED OCTOBER 2018

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Product Folder Links: AM6548 AM6528 AM6546 AM6526 AM6527

Detailed Description

•

Universal Scalable Shader Engine ( USSE™):

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Multithreaded engine incorporating vertex and pixel shader functionality

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Automatic load balancing of vertex and pixel processing tasks

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Present and texture load accelerator (PTLA):

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Enables to move, rotate, twiddle, and scale texture surfaces

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Supports RGB, ARGB, YUV4:2:2, and YUV4:2:0 surface formats

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Supports bilinear upscale, boxcar filter downscale

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Supports source colorkey

•

Fully virtualized memory addressing for operating system (OS) operation in a unified memory

architecture:

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Memory management unit (MMU)

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Up to 4 GB virtual address space natively supported by graphics core:

•

Address extension to 48-bit provided by RAT function

Graphics Feature Overview:

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Texture support:

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Cube map

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Projected textures

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Non-square textures

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Texture formats:

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RGBA 8888, 565, 1555, and 1565

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Monochromatic 8, 16, 16f, 32f, and 32int

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Dual channel, 8:8, 16:16, and 16f:16f

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Compressed textures:

•

PVRTC-i 2 bpp

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PVRTC-i 4 bpp

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PVRTC-ii 2 bpp

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PVRTC-ii 4 bpp

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ETC1

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DXT 1-5 and BC 4-5

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Programmable support for YUV formats:

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Programmable matrix in hardware, coefficients on 12 bits

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YUV4:2:2, YUV4:2:0, two planes (NV12 or NV21); YUV4:2:0, three planes

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Resolution support:

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Frame buffer maximum = 4096 × 4096

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Texture maximum size = 4096 × 4096

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Texture filtering:

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Bilinear, Trilinear, Anisotropic

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Independent minification and magnification control

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Antialiasing:

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4 × multisampling

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Programmable sample positions

NOTE

TI provides the DXT1-5 and BC4-5 texture compression technology for use only with a

Microsoft Windows operating system. A separate license is required for the use of this

technology (also referred to as S3 texture compression technology) with any other operating

system.

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