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ICS343 데이터시트(PDF) 1 Page - Integrated Device Technology

부품명 ICS343
상세설명  FIELD PROGRAMMABLE TRIPLE OUTPUT SS VERSACLOCK SYNTHESIZER
PDF  9 Pages
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제조업체  IDT [Integrated Device Technology]
홈페이지  http://www.idt.com
Logo IDT - Integrated Device Technology

ICS343 데이터시트(HTML) 1 Page - Integrated Device Technology

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DATASHEET
FIELD PROGRAMMABLE TRIPLE OUTPUT SS VERSACLOCK SYNTHESIZER
I CS3 4 3
IDT®/ ICS™ FIELD PROGRAMMABLE TRIPLE OUTPUT SS VERSACLOCK SYNTHESIZER 1
ICS343
REV M 090613
Description
The ICS343 is a low cost, triple-output, field programmable
clock synthesizer. The ICS343 can generate three output
frequencies from 250 kHz to 200 MHz, using up to three
independently configurable PLLs. The outputs may employ
Spread Spectrum techniques to reduce system
electro-magnetic interference (EMI).
Using IDT’s VersaClock™ software to configure the PLL
and output, the ICS343 contains a One-Time
Programmable (OTP) ROM to allow field programmability.
Using Phase-Locked Loop (PLL) techniques, the device
runs from a standard fundamental mode, inexpensive
crystal, or clock. It can replace multiple crystals and
oscillators, saving board space and cost.
The device also has a power down feature that tri-states the
clock outputs and turns off the PLLs when the PDTS pin is
taken low.
The ICS343 is also available in factory-programmed
custom versions for high-volume applications.
Features
• 8-pin SOIC package (Pb-free)
• Highly accurate frequency generation
• M/N Multiplier PLL: M = 1...2048, N = 1...1024
• Output clock frequencies up to 200 MHz
• Spread spectrum capability for lower system EMI
• Center or Down Spread up to 4% total
• Selectable 32 kHz or 120 kHz modulation
• Input crystal frequency from 5 to 27 MHz
• Input clock frequency from 2 to 50 MHz
• Operating voltage of 3.3 V, using advanced, low power
CMOS process
• For one output clock, use the ICS341. For two output
clocks, see the ICS342. For more than three outputs, see
the ICS345 or ICS348.
Block Diagram
Crystal
Oscillator
PDTS (both outputs and PLL)
OTP ROM
with PLL
Divider
Values
VDD
GND
CLK1
CLK3
CLK2
PLL Clock Synthesis,
Spred Spectrum and
Control Circuitry
X2
Crystal or
clock input
External capacitors are
required with a crystal input.
X1/ICLK


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