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AD9129BBCZ 데이터시트(PDF) 57 Page - Analog Devices

부품명 AD9129BBCZ
상세설명  RF Digital-to-Analog Converter
PDF  66 Pages
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제조업체  AD [Analog Devices]
홈페이지  http://www.analog.com
Logo AD - Analog Devices

AD9129BBCZ 데이터시트(HTML) 57 Page - Analog Devices

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Data Sheet
AD9119/AD9129
Rev. B | Page 57 of 66
Interrupt Enable Register 0
Address: 0x03, Reset: 0x00, Name: IRQ Enable 0
Table 20. Bit Descriptions for IRQ Enable 0
Bits
Bit Name
Description
Reset
Access
7
FIFO_Warn2 interrupt enable
Enables the FIFO warning within two slots of overwrite interrupt
0
R/W
6
FIFO_Warn1 interrupt enable
Enables the FIFO warning within one slot of overwrite interrupt
0
R/W
5
SPIFrmAck interrupt enable
Enables the FIFO SPI-based calibration acknowledgement of SPIFrmReq
(Address 0x11, Bit 7) going from 0b to1b
0
R/W
4
Reserved
Reserved
0
R
3
DLL warn interrupt enable
Enables the DLL warning flag that the data receiver is no longer locked
0
R/W
2
DLL lock interrupt enable
Enables the DLL warning flag that the data receiver is now locked
0
R/W
1
Retimer lost interrupt enable
Enables the retimer lost interrupt indication
0
R/W
0
Retimer lock interrupt enable
Enables the retimer lock interrupt indication
0
R/W
Interrupt Enable Register 1
Address: 0x04, Reset: 0x00, Name: IRQ Enable 1
Table 21. Bit Descriptions for IRQ Enable 1
Bits
Bit Name
Description
Reset
Access
7
Reserved
Reserved
0
R/W
6
AED pass interrupt enable
Enables the AED pass interrupt reporting saying that eight valid samples captured
0
R/W
5
AED fail interrupt enable
Enables the AED fail interrupt reporting that a miscompare occurred
0
R/W
4
SED fail interrupt enable
Enables the SED fail interrupt reporting that a miscompare occurred
0
R/W
3
Parity error falling edge enable
Enables the parity fail due to a falling edge-based parity detected error
0
R/W
2
Parity error rising edge enable
Enables the parity fail due to a rising edge-based parity detected error
0
R/W
1
Reserved
Reserved
0
R
0
Reserved
Reserved
0
R
Interrupt Status Register 0
Address: 0x05, Reset: 0x00, Name: IRQ Request 0
Table 22. Bit Descriptions for IRQ Request 0
Bits
Bit Name
Description
Reset
Access
7
FIFO_Warn2 interrupt status
Indicates that the FIFO is within two slots of overwrite
0
R
6
FIFO_Warn1 interrupt status
Indicates that the FIFO is within one slot of overwrite
0
R
5
SPIFrmAck interrupt status
Indicates acknowledgement of SPIFrmReq has changed from 0b to1b
0
R
4
Reserved
Reserved
0
R
3
DLL warn interrupt status
Indicates that the DLL (data receiver) is close to coming unlocked and action is
needed
0
R
2
DLL lock interrupt status
Indicates that the DLL (data receiver) is now locked
0
R
1
Retimer lost interrupt status
Indicates that the retimer PLL is no longer locked
0
R
0
Retimer lock interrupt status
Indicates that the retimer PLL is now locked
0
R



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