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4051G-P16-R 데이터시트(PDF) 4 Page - Unisonic Technologies

부품명 4051G-P16-R
상세설명  8-CHANNEL ANALOG MULTIPLEXERS/DEMULTIPLEXERS
PDF  6 Pages
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제조업체  UTC [Unisonic Technologies]
홈페이지  http://www.utc-ic.com
Logo UTC - Unisonic Technologies

4051G-P16-R 데이터시트(HTML) 4 Page - Unisonic Technologies

  4051G-P16-R Datasheet HTML 1Page - Unisonic Technologies 4051G-P16-R Datasheet HTML 2Page - Unisonic Technologies 4051G-P16-R Datasheet HTML 3Page - Unisonic Technologies 4051G-P16-R Datasheet HTML 4Page - Unisonic Technologies 4051G-P16-R Datasheet HTML 5Page - Unisonic Technologies 4051G-P16-R Datasheet HTML 6Page - Unisonic Technologies  
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4051
CMOS IC
UNISONIC TECHNOLOGIES CO., LTD
4 of 6
www.unisonic.com.tw
QW-R502-054.E
ELECT RI CAL CH ARACT ERI ST I CS(Cont .)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
CONTROL INPUTS – INHIBIT A, B, C (Voltages Referenced to VSS)
VDD=5V
2.25
1.5
VDD=10V
4.50
3.0
Low Level Input Voltage
VDD=15V
VIL
RON= per spec,
IOFF = per spec
6.75
4.0
V
VDD=5V
3.5
2.75
VDD=10V
7
5.5
High Level Input Voltage
VDD=15V
VIH
RON= per spec,
IOFF = per spec
11
8.25
V
Input Leakage Current
ILEAK
VIN= 0 or VDD, VDD=15V
±0.00001
±0.1
µA
Input Capacitance
CIN
5.0
7.5
pF
DY N AM I C ELECT RI CAL CH ARACT ERI ST I CS
(CL = 50pF, TA=25℃, VEE
VSS, unless otherwise specified)
PARAMETER
SYMBOL
VDD-VEE
VDC
TEST CONDITIONS
MIN
TYP
MAX
UNIT
5
tPLH, tPHL =(0.17 ns/pF)CL + 26.5ns
35
90
10
tPLH, tPHL =(0.08 ns/pF)CL + 11ns
15
40
Propagation Delay Times
Switch Input to Switch
Output (RL = 10k
Ω)
tPLH, tPHL
15
tPLH, tPHL =(0.06 ns/pF)CL + 9ns
12
30
ns
5
350
700
10
170
340
Inhibit to Output
tPHZ, tPLZ
tPZH, tPZL
15
(RL=10k
Ω, VEE=VSS)
Output “1” or “0” to High Impedance,
or High Impedance to “1” or “0” Level
140
280
ns
5
360
720
10
160
320
Control Input to Output
tPLH, tPHL
15
RL = 10k
Ω, VEE = VSS
120
240
ns
Total Harmonic Distortion
THD
10
RL = 10K
Ω, f = 1 kHz, Vin = 5 VPP
0.07
%
Bandwidth
BW
10
RL = 1k
Ω, VIN = 1/2 (VDD–VEE) p–p,
CL = 50pF, 20 Log (VOUT/VIN) = -3dB)
17
MHz
Off Channel Feedthrough
Attenuation
10
RL=1K
Ω, VIN = 1/2 (VDD–VEE) p–p
fIN = 4.5 MHz
-50
dB
Channel Separation
10
RL = 1k
Ω, VIN = 1/2 (VDD–VEE) p–p
fIN = 3MHz
-50
dB
Crosstalk, Control Input to
Common O/I
10
R1 = 1k
Ω, RL = 10kΩ Control
tTLH = tTHL = 20ns, Inhibit = VSS
75
mV
Notes: 1. Data of “TYP” is intended as an indication of the IC’s potential performance.
2. For voltage drops across the switch(
∆VSW)>600mV (>300mV at high temperature), excessive VDD current
may be drawn, i.e. the current out of the switch may contain both VDD and switch input components. The
reliability of the device will be unaffected unless the Maximum Ratings are exceeded.



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