© 2005 Fairchild Semiconductor Corporation

DS500626

www.fairchildsemi.com

September 2001

Revised February 2005

74ALVC00

Low Voltage Quad 2-Input NAND Gate

with 3.6V Tolerant Inputs and Outputs

General Description

The ALVC00 contains four 2-input NAND gates. This prod-

tions with I/O compatibility up to 3.6V.

The ALVC00 is fabricated with an advanced CMOS tech-

nology to achieve high-speed operation while maintaining

low CMOS power dissipation.

Features

■ 3.6V tolerant inputs and outputs

■ Power-off high impedance inputs and outputs

■ Uses patented Quiet Series

¥ noise/EMI reduction

circuitry

■ Latchup conforms to JEDEC JED78

■ ESD performance:

Human body model

! 2000V

Machine model

! 250V

Ordering Code:

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Symbol

IEEE/IEC

Connection Diagram

Pin Descriptions

Quiet Series

¥ is a trademark of Fairchild Semiconductor Corporation.

Order Number

Package Number

Package Description

74ALVC00M

M14A

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

74ALVC00MTC

MTC14

14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Pin Names

Description

Inputs

Outputs