PRELIMINARY TECHNICAL DATA

REV. PrF 09/2003

–26–

AD5380

3-Byte Mode

Three byte mode allows the user update more than one channel in a write sequence without having to write the device

address byte each time. The device address byte is only required once and subsequent channel updates require the pointer

byte and the data bytes. In three byte mode the user begins with an address byte (R/

W = 0) after which the DAC will

acknowledge that it is prepared to receive data by pulling SDA low. The address byte is followed by the pointer

byte, this addresses the specific channel in the DAC to be addressed and is also acknowledged by the DAC. This is

then followed by the two data bytes. REG1 and REG0 determine the register to be updated.

If a STOP condition is not sent following the data bytes another channel can be updated by sending a new pointer

byte followed by the data bytes. This mode only requires 3-bytes to be sent to update any channel once the device

has been initially addressed and reduces the software overhead in updating the AD5380 channels. A STOP condition

at any time exits this mode. Figure 12 shows a typical configuration.

Figure 12 . 3-Byte AD5380, I2C Write Operation

0

A0

ACK

BY

AD538X

MSB

POINTER BYTE FOR CHANNEL “N”

A5

A4

A3

A2

A1

0

MOST SIGNIFICANT DATA BYTE

LEAST SIGNIFICANT DATA BYTE

SCL

SDA

REG1

LSB

MSB

LSB

ACK

BY

AD538X

ACK

BY

AD538X

REG0

MSB

1

0

10

1

AD0

R/

W

ACK

BY

AD538X

ADDRESS BYTE

START

COND

BY

MASTER

SCL

SDA

AD1

0

A0

ACK

BY

AD538X

MSB

A5

A4

A3

A2

A1

0

MOST SIGNIFICANT DATA BYTE

LEAST SIGNIFICANT DATA BYTE

SCL

SDA

REG1

LSB

MSB

LSB

ACK

BY

AD538X

ACK

BY

AD538X

STOP

COND

BY

MASTER

REG0

MSB

SCL

SDA

DATA FOR CHANNEL “N”

POINTER BYTE FOR CHANNEL “NEXT CHANNEL”

DATA FOR CHANNEL “NEXT CHANNEL”