전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

Preview PDF HTML

PIC18F4520E/MLQTP 데이터시트(PDF) 285 Page - Microchip Technology

부품명 PIC18F4520E/MLQTP
상세설명  28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology
PDF  390 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  MICROCHIP [Microchip Technology]
홈페이지  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC18F4520E/MLQTP 데이터시트(HTML) 285 Page - Microchip Technology

Back Button PIC18F4520E/MLQTP Datasheet HTML 281Page - Microchip Technology PIC18F4520E/MLQTP Datasheet HTML 282Page - Microchip Technology PIC18F4520E/MLQTP Datasheet HTML 283Page - Microchip Technology PIC18F4520E/MLQTP Datasheet HTML 284Page - Microchip Technology PIC18F4520E/MLQTP Datasheet HTML 285Page - Microchip Technology PIC18F4520E/MLQTP Datasheet HTML 286Page - Microchip Technology PIC18F4520E/MLQTP Datasheet HTML 287Page - Microchip Technology PIC18F4520E/MLQTP Datasheet HTML 288Page - Microchip Technology PIC18F4520E/MLQTP Datasheet HTML 289Page - Microchip Technology Next Button
Zoom Inzoom in Zoom Outzoom out
 285 / 390 page
background image
 2004 Microchip Technology Inc.
Preliminary
DS39631A-page 283
PIC18F2420/2520/4420/4520
CLRF
Clear f
Syntax:
CLRF
f {,a}
Operands:
0
≤ f ≤ 255
a
∈ [0,1]
Operation:
000h
→ f
1
→ Z
Status Affected:
Z
Encoding:
0110
101a
ffff
ffff
Description:
Clears the contents of the specified
register.
If ‘a’ is ‘0’, the Access Bank is selected.
If ‘a’ is ‘1’, the BSR is used to select the
GPR bank (default).
If ‘a’ is ‘0’ and the extended instruction
set is enabled, this instruction operates
in Indexed Literal Offset Addressing
mode whenever f
≤ 95 (5Fh). See
Section 24.2.3 “Byte-Oriented and
Bit-Oriented Instructions in Indexed
Literal Offset Mode” for details.
Words:
1
Cycles:
1
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Read
register ‘f’
Process
Data
Write
register ‘f’
Example:
CLRF
FLAG_REG, 1
Before Instruction
FLAG_REG
=
5Ah
After Instruction
FLAG_REG
=
00h
CLRWDT
Clear Watchdog Timer
Syntax:
CLRWDT
Operands:
None
Operation:
000h
→ WDT,
000h
→ WDT postscaler,
1
→ TO,
1
→ PD
Status Affected:
TO, PD
Encoding:
0000
0000
0000
0100
Description:
CLRWDT
instruction resets the
Watchdog Timer. It also resets the
postscaler of the WDT. Status bits, TO
and PD, are set.
Words:
1
Cycles:
1
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
No
operation
Process
Data
No
operation
Example:
CLRWDT
Before Instruction
WDT Counter
=
?
After Instruction
WDT Counter
=
00h
WDT Postscaler
=
0
TO
=1
PD
=1



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com