PIC18F4520ESLASHMLQTP datasheet(287/390 Pages) MICROCHIP

287 / 390 page

 2004 Microchip Technology Inc.

Preliminary

DS39631A-page 285

PIC18F2420/2520/4420/4520

CPFSGT

Compare f with W, skip if f > W

Syntax:

CPFSGT

f {,a}

Operands:

≤ f ≤ 255

∈ [0,1]

Operation:

(f) –

(W),

skip if (f) > (W)

(unsigned comparison)

Status Affected:

None

Encoding:

0110

010a

ffff

Description:

Compares the contents of data memory

location ‘f’ to the contents of the W by

performing an unsigned subtraction.

If the contents of ‘f’ are greater than the

contents of WREG

, then the fetched

instruction is discarded and a NOP is

executed instead, making this a

two-cycle instruction.

If ‘a’ is ‘0’, the Access Bank is selected.

If ‘a’ is ‘1’, the BSR is used to select the

GPR bank (default).

If ‘a’ is ‘0’ and the extended instruction

set is enabled, this instruction operates

in Indexed Literal Offset Addressing

mode whenever f

≤ 95 (5Fh). See

Section 24.2.3 “Byte-Oriented and

Bit-Oriented Instructions in Indexed

Literal Offset Mode” for details.

Words:

Cycles:

1(2)

Note: 3 cycles if skip and followed

by a 2-word instruction.

Q Cycle Activity:

Decode

Read

Process

Data

operation

If skip:

operation

If skip and followed by 2-word instruction:

operation

Example:

HERE

CPFSGT REG, 0

NGREATER

GREATER

Before Instruction

Address (HERE)

After Instruction

If REG

Address (GREATER)

If REG

≤

Address (NGREATER)

CPFSLT

Compare f with W, skip if f < W

Syntax:

CPFSLT

f {,a}

Operands:

≤ f ≤ 255

∈ [0,1]

Operation:

(f) –

(W),

skip if (f) < (W)

(unsigned comparison)

Status Affected:

None

Encoding:

0110

000a

ffff

Description:

Compares the contents of data memory

location ‘f’ to the contents of W by

performing an unsigned subtraction.

If the contents of ‘f’ are less than the

contents of W, then the fetched

instruction is discarded and a NOP is

executed instead, making this a

two-cycle instruction.

If ‘a’ is ‘0’, the Access Bank is selected.

If ‘a’ is ‘1’, the BSR is used to select the

GPR bank (default).

Words:

Cycles:

1(2)

Note:

3 cycles if skip and followed

by a 2-word instruction.

Q Cycle Activity:

Decode

Read

Process

Data

operation

If skip:

operation

If skip and followed by 2-word instruction:

operation

Example:

HERE

CPFSLT REG, 1

NLESS

LESS

Before Instruction

Address (HERE)

After Instruction

If REG

Address (LESS)

If REG

≥

Address (NLESS)

PIC18F4520E/MLQTP 데이터시트(PDF) 287 Page - Microchip Technology

PIC18F4520E/MLQTP 데이터시트(HTML) 287 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

데이터시트 다운로드

링크 URL