32F030F4P6 datasheet(62/93 Pages) STMICROELECTRONICS

62 / 93 page

Electrical characteristics

STM32F030x4/x6/x8/xC

62/93

DS9773 Rev 4

All I/Os are CMOS- and TTL-compliant (no software configuration required). Their

characteristics cover more than the strict CMOS-technology or TTL parameters. The

coverage of these requirements is shown in Figure 19 for standard I/Os, and in Figure 20 for

5 V tolerant I/Os. The following curves are design simulation results, not tested in

production.

Ilkg

Input leakage

current(2)

TC, FT and FTf I/O

TTa in digital mode

VSS ≤ VIN ≤ VDDIOx

± 0.1

µA

TTa in digital mode

VDDIOx ≤ VIN ≤ VDDA

TTa in analog mode

VSS ≤ VIN ≤ VDDA

± 0.2

FT and FTf I/O (3)

VDDIOx ≤ VIN ≤ 5 V

RPU

Weak pull-up

equivalent resistor

(4)

VIN = VSS

RPD

Weak pull-down

equivalent

resistor(4)

VIN = VDDIOx

CIO

I/O pin capacitance

1. Data based on design simulation only. Not tested in production.

2. The leakage could be higher than the maximum value, if negative current is injected on adjacent pins. Refer to Table 45:

I/O current injection susceptibility.

3. To sustain a voltage higher than VDDIOx + 0.3 V, the internal pull-up/pull-down resistors must be disabled.

4. Pull-up and pull-down resistors are designed with a true resistance in series with a switchable PMOS/NMOS. This

PMOS/NMOS contribution to the series resistance is minimal (~10% order).

Table 46. I/O static characteristics (continued)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

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