AR8327N-AL1A-R datasheet(8/394 Pages) ETC2

8 / 394 page

8 • AR8327/AR8327N Seven-port Gigabit Ethernet Switch

Atheros Communications, Inc.

8 • June 2011

COMPANY CONFIDENTIAL

3.9.15 HNAT_Control ......................... 336

3.9.16 NAPT_Entry_Lock_Control0 .. 338

3.9.17 NAPT_Entry_Lock_Control1 .. 338

3.9.18 NAPT_Used_Account .............. 339

3.9.19 Entry_Edit_Data0 ..................... 339

3.9.20 Entry_Edit_Data1 ..................... 339

3.9.21 Entry_Edit_Data2 ..................... 339

3.9.22 Entry_Edit_Data3 ..................... 340

3.9.23 Entry_Edit_control ................... 340

3.9.24 Private_Base_IP_ADDR Register .

341

3.10 PHY Control Registers ....................... 343

3.10.1 Control Register ........................ 344

3.10.2 Status Register ........................... 346

3.10.3 PHY Identifier ........................... 347

3.10.4 PHY Identifier 2 ........................ 348

3.10.5 Auto-negotiation Advertisement

3.10.6 Link Partner Ability Register .. 350

3.10.7 Auto-negotiation Expansion

3.10.8 Next Page Transmit Register .. 352

3.10.9 Link Partner Next Page Register ..

353

3.10.10 1000Base-T Control Register . 354

3.10.11 1000Base-T Status Register .... 355

3.10.12 MMD Access Control Register 356

3.10.13 MMD Access Address Data

3.10.14 Extended Status Register ....... 357

3.10.15 Function Control Register ...... 358

3.10.16 PHY Specific Status Register . 359

3.10.17 Interrupt Enable Register ....... 360

3.10.18 Interrupt Status Register ........ 362

3.10.19 Smart Speed Register .............. 363

3.10.20 Receive Error Counter Register ..

364

3.10.21 Virtual Cable Tester Control

3.10.22 Virtual Cable Tester Status

3.10.23 Debug Port ............................... 366

3.10.24 Debug Port 2 (R/W Port) ....... 366

3.10.25 Debug Register — Analog Test

Control ........................................ 367

3.10.26 Debug Register — System Mode

Control ....................................... 368

3.10.27 Debug Register — System Mode

Control ....................................... 369

3.10.28 Debug Register—Hib Control and

Auto Negotiation Test Register 371

3.10.29 Debug Register — RGMII Mode

Selection ..................................... 372

3.10.30 Debug Register—Green Feature

Configure Register ................... 373

3.11 MMD3 — PCS Register ...................... 374

3.11.1 PCS Control1 ............................. 374

3.11.2 PCS Status1 ................................ 374

3.12 EEE Capability Register ..................... 376

3.12.1 EEE Wake Error Counter ........ 376

3.13 MMD7 — Auto-negotiation Register 377

3.13.1 AN Package ............................... 377

3.13.2 AN Status ................................... 378

3.13.3 AN XNP Transmit .................... 378

3.13.4 AN XNP Transmit1 .................. 379

3.13.5 AN XNP Transmit2 .................. 379

3.13.6 AN LP XNP Ability .................. 379

3.13.7 AN LP XNP Ability1 ................ 380

3.13.8 AN LP XNP Ability2 ................ 380

3.13.9 EEE Advertisement .................. 380

3.13.10 EEE LP Advertisement .......... 381

3.13.11 EEE Ability Auto-negotiation

Result .......................................... 382

4 Electrical Characteristics ..........383

4.1 Absolute Maximum Ratings .............. 383

4.2 Recommended Operating Conditions 383

4.3 RGMII/GMII Characteristics ............. 383

4.4 Power-on Strapping ............................ 384

4.4.12 Power-on-Reset Timing ........... 385

4.5 AC Timing ............................................ 385

4.5.1 XTAL/OSC Timing .................. 385

4.5.2 MII Timing ................................. 386

4.5.3 GMII Timing ............................. 387

4.5.4 RGMII Timing ........................... 388

4.5.5 SPI Timing ................................. 389

4.5.6 MDIO Timing ............................ 389

4.6 Typical Power Consumption Parameters

390

5 Package Dimensions .................391

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