LD7591GS datasheet(13/20 Pages) LEADTREND

13 / 20 page

LD7591

Leadtrend Technology Corporation

www.leadtrend.com.tw

LD7591-DS-00 March 2010

Output Drive Stage

An output stage of a CMOS buffer, with typical

800mA/-1200mA driving capability, is incorporated to

drive a power MOSFET directly. The output voltage is

clamped at 13V to protect the MOSFET gate even when

the VCC voltage is higher than 13V.

Current

Sensing

and

Leading-edge

Blanking

The typical voltage mode of PFC controller feedbacks the

voltage signals to close the control loop and achieve

regulation. The LD7591 detects the primary MOSFET

current from the CS pin, which is for the pulse-by-pulse

current limit. The maximum voltage threshold of the

current sensing pin is set at 0.8V. From above, the

MOSFET peak current can be obtained from below.

)

MAX

(

PEAK

A 250ns leading-edge blanking (LEB) time is included in

the input of CS pin to prevent the false-trigger from the

current spike. The R-C filter may be eliminated in some

low power applications, such as the pulse width of the

turn-on spikes is below 250ns and the negative spike on

the CS pin is below -0.3V.

However, the pulse width of the turn-on spike is

determined according to the output power, circuit design

and PCB layout. It is strongly recommended to adopt a

smaller R-C filter for higher power application to avoid the

CS pin being damaged by the negative turn-on spike.

Fig. 20

Fault Protection

There are several critical protections integrated in the

LD7591 to prevent the power supply or adapter from

being damaged. Those damages usually come from open

or short condition on the pins of LD7591.

Under the conditions listed below, the gate output will turn

off immediately to protect the power circuit ---

Ramp pin short to ground

Ramp pin floating

CS pin floating

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