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AT2004
4 Channels ADPCM Processor with Echo Cancellation and Conferencing
Page 21 of 25
©2001 Atelic System, Inc
Electrical Characteristics:
(0
°C to 70°C)
DC Electrical Characteristics
(VDD=3.3V+20%-10%)
Parameter
Symbol
Minimum
Typical
Maximum
Units
Notes
Active Supply Current
Ivcc
40
mA
1,2
Power down
IVCCPD
< 1
mA
3
Input Leakage
II
-1.0
+1.0
µA
Output Leakage
IO
-1.0
+1.0
µA
4
Output Current (2.4V)
IOH
1.2
mA
Output Current (0.4 v)
IOL
4
mA
Notes:
1. CLKP = CLKA = 2.048MHz; MCLK = 10MHz.
2. Outputs open; inputs swinging full supply levels; 4 channel full duplex operation.
3. Power down; Xtal = high; fsy, CLKA, CLKP all 0.
4. Xout and Yout are 3-stated.
PCM Interface
(0
°C to 70°C)
AC Electrical Characteristics
(VDD=3.3V+20%-10%)
Parameter
Symbol
Minimum
Typical
Maximum
Units
Notes
CLKP, CLKA Period
tPXY
244
3906
ns
1
CLKP, CLKA Pulse Width
tWXYL
tWXYH
100
ns
CLKP, CLKA Rise Fall
Times
tRXY
tFXY
10
20
ns
Hold Time from CLKP,
CLKA to FSY
tHOLD
0
ns
2
Setup Time from FSY high
to CLKP, CLKA low
tSF
50
ns
2
Setup Time for Xin, Yin to
CLKP, CLKA low
tSD
50
ns
2
Hold Time from Xin, Yin to
CLKP, CLKA low
tHD
50
ns
2
Delay Time from CLKP,
CLKA to Valid Xout, Yout
tDXYO
10
150
ns
3
Notes:
1. Maximum width of FSY is CLKP/CLKA period (except for signaling frame).
2. Measured at VIH = 2.0V, VIL = 0.8V, and 10ns maximum rise and fall times.
3. Load = 150 pF + 2LSTTL loads.
4. For LSB of PCM or ADPCM byte.
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