LD5525

06/30/2015

9

Leadtrend Technology Corporation

www.leadtrend.com.tw

LD5525-DS-00 June 2015

Application Information

Operation Overview

The LD5525 is built in the multi-mode PWM controller, in

which operates a constant frequency to achieve the CCM

as heavy load. For demanding higher power efficiency

and power-saving in light load condition, the LD5525

implements QR function to allow the valley switching and

accomplish zero voltage switching (ZVS). Under different

load conditions, LD5525 provides the different solutions

for achieving higher efficiency and performance.

Under Voltage Lockout (UVLO)

An UVLO comparator is implemented in it to detect the

voltage on the VCC pin. It would assure the supply

voltage enough to turn on the LD5525 PWM controllers

and further to drive the power MOSFET.

As shown in Fig.

7, a hysteresis is built in to prevent the shutdown from the

voltage dip during startup.

The turn-on and turn-off

threshold level are set at 16.0V and 7.5V, respectively.

Vcc

UVLO(on)

UVLO(off)

t

t

I(Vcc)

startup current

(~uA)

operating current

(~ mA)

Fig. 7

Startup Current and Startup Circuit

The typical startup circuit to generate the LD5525 VCC is

shown in Fig. 8.

During the startup transient, the VCC is

lower than the UVLO threshold thus there is no gate pulse

produced

from

LD5525

to

drive

power

MOSFET.

Therefore, the current through R1 will provide the startup

current and to charge the capacitor C1.

Whenever the

VCC voltage is high enough to turn on the LD5525 and

further to deliver the gate drive signal, the supply current

is provided from the auxiliary winding of the transformer.

Lower startup current requirement on the PWM controller

will help to increase the value of R1 and then reduce the

power consumption on R1. By using CMOS process and

the special circuit design, the maximum startup current of

LD5525 is only 3

A. If a higher resistance value of R1 is

chosen, it usually takes more time to start up. To select

the value of R1 and C1 carefully will optimize the power

consumption and startup time.

EMI

Filter

R1

OUT

CS

VCC

GND

LD5525

AC

input

C1

Cbulk

D1

Fig. 8

Q-R Mode Detection

The transformer will be demagnetized after the main

power MOSFET turns off. A quasi resonant signal will be

detected from auxiliary winding by FB pin through the

external resister.

As soon as the current of the secondary side diode is

down to zero during MOSFET-off period, the transformer

’s