| 전자부품 데이터시트 검색엔진 |
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FS98O02B-PCE 데이터시트(PDF) 33 Page - Fortune Semiconductor Corp. |
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FS98O02B-PCE 데이터시트(HTML) 33 Page - Fortune Semiconductor Corp. |
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33 / 50 page ![]() FS98O02 Rev.1.5 33/50 Table 16-7: FTB selection table SFT[2] FTB 1 0 ADC Low Pass Filter is disabled 1 ADC Low Pass Filter is enabled Table 16-8: INH selection table SFT[0] INH (ADC positive input port signal) 0 FTB 1 FTIN 6. Set SINL[1:0] to decide the ADC negative input port signal. (Table 16-9) Table 16-9: INL selection table SINL[1:0] INL for FS98O02A / B INL for FS98O02C 00 AD2 AD2 01 AD3 AD3 10 VRRL AD3 11 LVDL LVDL 7. Set ADG[1:0] to decide the ADC input gain. (Table 16-10) Table 16-10: ADG selection table ADG[1:0] ADC input gain 00 2/3 01 1 10 2 11 7/3 8. Set SVRH[1:0] to decide the ADC reference voltage positive input port signal. (Table 16-11) Table 16-11: VRH selection table SVRH[1:0] VRH (ADC reference voltage positive input) 0 AD4 1 VRRH 9. Set SVRL[1:0] to decide the ADC reference voltage negative input port signal. (Table 16-12) Table 16-12: VRL selection table SVRL[1:0] VRL for FS98O02A / B VRL for FS98O02C 00 AGND AGND 01 AD3 AD3 10 VRRL AD3 11 VRRL AD3 10. Set ADIE and GIE register flags to enable the ADC interrupt 11. Set ADEN register flag, the embedded Σ-Δ modulator will be enabled. 12. Set ADRST register flag, the comb filter will be enabled. 13. When the ADC interrupt happen, read the ADO[23:8] to get the ADC output.(ADO[23:22] are signed bits) 1 The input of ADC Low Pass Filter is FTIN, and the output is FTB |
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