AD9958

Rev. 0 | Page 16 of 40

CH 0

AD9958

REF CLK

CH 1

ADCMP563

–

+

Figure 29. Agile Clock Source with Duty Cycle Control Using the Phase Offset Value in DDS to Change the DC Voltage to Comparator

CH 0

CH 1

AD9958

REF CLK

AD9515

AD9514

AD9513

AD9512

LVPECL

LVDS

CMOS

n

IMAGE

n

PROGRAMMABLE 1 TO 32

DIVIDER AND DELAY ADJUST

CLOCK OUTPUT

SELECTION(S)

n = DEPENDENT ON

PRODUCT SELECTION

AD9515

AD9514

AD9513

AD9512

LVPECL

LVDS

CMOS

Figure 30. Clock Generation Circuit Using the AD951x Series of Clock Distribution Chips