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PACKET PROTOCOL

9

SDA

SCL

St

Start

1−7

8

1−8

9

1−8

9

9

Sp

Stop

Slave Address

ACK

DATA

ACK

DATA

ACK

ACK

Condition

Condition

R/W

Read Operation

Transmitter

M

M

M

S

S

M

S

M

M

M

Data Type

St

Slave Address

R

ACK

DATA

ACK

DATA

ACK

NACK

Sp

Write Operation

Transmitter

M

M

M

S

M

S

M

S

S

M

Data Type

St

Slave Address

W

ACK

DATA

ACK

DATA

ACK

ACK

Sp

R/W:

Read Operation if 1; Otherwise, Write Operation

ACK:

Acknowledgement of a Byte if 0

DATA: 8 Bits (Byte)

NACK: Not Acknowledgement if 1

T0049-01

M: Master Device S: Slave Device St: Start Condition

Sp: Stop Condition W: Write R: Read

WRITE OPERATION

Transmitter

M

M

Data Type

Slave Address

Reg Address

Write Data

R0002-01

M: Master Device S: Slave Device

St: Start Condition W: Write ACK: Acknowledge Sp: Stop Condition

M

M

S

M

St

W

ACK

Sp

S

ACK

M

S

ACK

READ OPERATION

PCM1680

SLES133 – MARCH 2005

A master device must control packet protocol, which consists of start condition, slave address, read/write bit,

data if writing or acknowledge if reading, and stop condition. The PCM1680 supports only slave receivers and

slave transmitters.

A master can write to any PCM1680 registers using a single access. The master sends a PCM1680 slave

address with a write bit, a register address, and the data. When undefined registers are accessed, the PCM1680

sends an acknowledgement, but the write operation does not occur. Figure 28 is a diagram of the write

operation.

Figure 28. Write Operation

A master can read any PCM1680 register using a single access. The master sends a PCM1680 slave address

with a read bit after transferring the register address. Then the PCM1680 transfers the data in the register

specified. Figure 29 is a diagram of the read operation.

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