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PIC12F635E/PQTP 데이터시트(PDF) 33 Page - Microchip Technology |
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PIC12F635E/PQTP 데이터시트(HTML) 33 Page - Microchip Technology |
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33 / 196 page ![]() © 2005 Microchip Technology Inc. Preliminary DS41232B-page 31 PIC12F635/PIC16F636/639 3.3.2 EC MODE The External Clock (EC) mode allows an externally generated logic level as the system clock source. When operating in this mode, an external clock source is connected to the OSC1 pin and the RA5 pin is available for general purpose I/O. Figure 3-2 shows the pin connections for EC mode. The Oscillator Start-up Timer (OST) is disabled when EC mode is selected. Therefore, there is no delay in operation after a Power-on Reset (POR) or wake-up from Sleep. Because the PIC12F635/PIC16F636/639 design is fully static, stopping the external clock input will have the effect of halting the device while leaving all data intact. Upon restarting the external clock, the device will resume operation as if no time had elapsed. FIGURE 3-2: EXTERNAL CLOCK (EC) MODE OPERATION 3.3.3 LP, XT, HS MODES The LP, XT and HS modes support the use of quartz crystal resonators or ceramic resonators connected to the OSC1 and OSC2 pins (Figure 3-1). The mode selects a low, medium or high gain setting of the internal inverter-amplifier to support various resonator types and speed. LP Oscillator mode selects the lowest gain setting of the internal inverter-amplifier. LP mode current consumption is the least of the three modes. This mode is best suited to drive resonators with a low drive level specification, for example, tuning fork type crystals. XT Oscillator mode selects the intermediate gain setting of the internal inverter-amplifier. XT mode current consumption is the medium of the three modes. This mode is better suited to drive resonators with a medium drive level specification, for example, low- frequency AT-cut quartz crystal resonators. HS Oscillator mode selects the highest gain setting of the internal inverter-amplifier. HS mode current consumption is the highest of the three modes. This mode is better suited for resonators that require a high drive setting, for example, high-frequency AT-cut quartz crystal resonators or ceramic resonators. Figure 3-3 and Figure 3-4 show typical circuits for quartz crystal and ceramic resonators, respectively. FIGURE 3-3: QUARTZ CRYSTAL OPERATION (LP, XT OR HS MODE) FIGURE 3-4: CERAMIC RESONATOR OPERATION (XT OR HS MODE) OSC1/CLKIN I/O (OSC2) RA4 Clock from Ext. System PIC12F635/PIC16F636/639 Note 1: Quartz crystal characteristics vary according to type, package and manufacturer. The user should consult the manufacturer data sheets for specifications and recommended application. 2: Always verify oscillator performance over the VDD and temperature range that is expected for the application. Note 1: A series resistor (RS) may be required for quartz crystals with low drive level. 2: The value of RF varies with the Oscillator mode selected (typically between 2 M Ω to 10 M Ω). C1 C2 Quartz OSC2 RS(1) OSC1 RF(2) Sleep PIC12F635/PIC16F636/639 Crystal To Internal Logic Note 1: A series resistor (RS) may be required for ceramic resonators with low drive level. 2: The value of RF varies with the Oscillator mode selected (typically between 2 M Ω to 10 M Ω). 3: An additional parallel feedback resistor (RP) may be required for proper ceramic resonator operation (typical value 1 M Ω). C1 C2 Ceramic OSC2 RS(1) OSC1 RP(3) Resonator RF(2) Sleep PIC12F635/PIC16F636/639 To Internal Logic |
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