TDA9112A datasheet(41/60 Pages) STMICROELECTRONICS

41 / 60 page

TDA9112A

41/60

9.4.5

Vertical moiré

To blur potential moiré patterns due to interaction

of deflection lines with CRT mask grid, the picture

position is to be slightly alternated at frame fre-

quency. For this purpose, a square waveform at

half-frame frequency is superimposed on the out-

put waveform. Its amplitude is adjustable through

VMOIRE I²C-bus control.

9.4.6

Biasing of vertical booster

The biasing voltage for external DC-coupled verti-

cal power amplifier is to be derived from VRefO

voltage provided on pin RefOut, using a resistor di-

vider, this to ensure the same temperature drift of

mean (DC) levels on both differential inputs and to

compensate for spread of VRefO value (and so

mean output value) between particular devices.

Figure 12. Vertical section block diagram

Synchro

Polarity

Controller

Discharge

Sampling

Capacitance

C-correction

Charge current

Trans-conductance amplifier

VOscF

VOut

VCap

VSyn

OSC

Cap.

VEHTIn

VAGCCap

VSIZE (I²C)

SCOR (I²C)

CCOR (I²C)

VMOIRE (I²C)

VPOF (I²C)

VSAG (I²C)

S-correction

VVOB

Internal

V-ramp

VPOS (I²C)

sawtooth

discharge

VVOTref

Vmidref

To geometry processing

VEHTG (I²C)

VVEHTnull

VPOS (I²C)

Vmidref

TDA9112A 데이터시트(PDF) 41 Page - STMicroelectronics

TDA9112A 데이터시트(HTML) 41 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

데이터시트 다운로드

링크 URL