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GPC3LP170A 데이터시트(PDF) 4 Page - Generalplus Technology Inc. |
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GPC3LP170A 데이터시트(HTML) 4 Page - Generalplus Technology Inc. |
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4 / 13 page ![]() GPC3LP170A © Generalplus Technology Inc. Proprietary & Confidential 4 Apr. 17, 2014 Version: 1.0 5. SIGNAL DESCRIPTIONS PIN Name Type Description IOA[7:0] I/O IOA[7:0] is a bi-directional I/O port, which can be software programmed as wakeup I/O. 1Mohm or 100Kohm pull low resistor IOA7 shares pad with IR output IOA[4:3]shares pad with detect IO function IOA3 also shares pad with SDA when serial programming cycle IOA[2:1]shares pad with feedback function IOA2 also shares pad with SCK when serial programming cycle IOA1 shares pad with external clock input IOA0 shares pad with external interrupt input IOB[7:0] I/O IOB[7:0] is a bi-directional I/O port, which can be software programmed as wakeup I/O. 1Mohm or 100Kohm pull low resistor IOB5 shared pad with XTAL 32KHz input IOB4 shared pad with XTAL 32KHz output IOB[3:0] shared pad with 256-level PWM output IOC[3:0] I/O IOC[3:0] is a bi-directional I/O port, which can be software programmed as wake up I/O. 1Mohm or 100Kohm pull low resistor IOC1 shares pad with XTAL8M output IOC0 shares pad with ROSC8M or XTAL8M input VDD15 P Power PAD for DC-DC . VSS15 G Ground PAD for DC-DC. LX1 I Must short to LX2 externally Inductance input of DC-DC(Inductance must be connected to VDD15) LX2 I Must short to LX1 externally Inductance input of DC-DC(Inductance must be connected to VDD15) VDDO O DC-DC Pumped voltage output VDD_REGIN P Power supply voltage input for regulator and should be shorted to VDDO through 10 ohm resistor VDD_REGOUT P Power supply voltage output for regulator and should be shorted to VDD externally VDD P Power supply voltage input for logic circuit and should be shorted to VDD_REGOUT externally VPP P Power supply voltage input for OTP ROM VSS2 G Ground reference for logic circuit VSS3 G Ground reference for logic circuit VSS4 G Ground reference for VPP VDDIO P Power supply voltage input for IO PAD VSS1 G Ground reference for IO PAD PVDD P PWM driver power PVSS G PWM driver ground reference RESB I System reset input, low active (with pull high) TEST I Test pin, high active (with pull low) EPM I Enable Program Mode pin, high active (with pull low) AUDP, AUDN O PWM output Total: 41 Pins Legend: I=Input, O=Output, P=Power, G=Ground |
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