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MSLSA 데이터시트(PDF) 4 Page - Mixed Signal Integration |
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MSLSA 데이터시트(HTML) 4 Page - Mixed Signal Integration |
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4 / 8 page ![]() 1 2 3 4 5 6 7 14 13 12 11 10 9 8 16 15 INB GAIN PD OUTA INA AGND CLK VSS OUT1 OUT2 OUT3 OUT4 OUT5 VDD OUTB OUT6 6/2017 Low Power Spectrum Analyzer Data Sheet ©2007-2 2017 Mixeed Signal Inteegratioon 4 Weeb Sitee ““www.mix-ssig.coom”” Pin Description 1. INB Inverting Uncommitted Op Amp Input B 2. OUTA Op Amp Output A 3. INA Inverting Op Amp Input A 4. AGND Connect to 1/2 VDD 5. CLK CMOS Level Selects position of bandpass filter outputs 6. VSS Negative Supply; Tie to 0VDC 7. GAIN Tertiary Control: 0V, 0 dB, 1/2 VDD 10 dB VDD 20 dB 8. PD Power Down; When CMOS high, device is powered down. 1/2 VDD selects regular power VSS selects low power 9. OUT1 1.12X Filter Output 10. OUT2 1.26X Filter Output 11. OUT3 1.41X Filter Output 12. OUT4 1.59X Filter Output 13. OUT5 1.78X Filter Output 14. OUT6 2X Octave Filter Output 15. VDD Positive Supply Typically 5.0 VDC 16. OUTB Uncommitted Op Amp B Output. Figure 3: MSLSA Pinout |
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