GPLB30A

© Generalplus Technology Inc.

Proprietary & Confidential

10

JAN. 07, 2008

Version: 1.4

is enabled, the WDT should be cleared every 0.5 second to avoid

accidental reset.

The WDT can be cleared through software

programming.

Note that the WDT only works when 32768Hz

clock is activated.

6.15. Bonding Options

6.15.1. Voltage regulator

− Enable

− Disable

6.15.2. Regulator output selection

− 2.5V

− 2.6V

− 2.7V

− 3.0V

Figure1: Bonding option for regulator Enable/Disable

Figure2: Bonding option for regulator output voltage select

6.16. Mask Options

6.16.1. 32768 oscillator

− X’TAL

− R-oscillator

6.16.2. Watchdog timer

− Enable

− Disable

6.16.3. PA[5:7]/SEG[69:67]

Each port/segment can be optioned as I/O or LCD segment

individually.

6.16.4. PA[2:3]/Tx,Rx/SEG[66:65]

Each port/segment can be optioned as I/O or LCD segment

individually.

VSS

BOPT2

BOPT2 = 0

Regulator disable

VSS

BOPT2

BOPT2 = 1

Regulator enable

PCB

IC

6.16.5. PB[0:7]/SEG[64:57]

Each port/segment can be optioned as I/O or LCD segment

individually.

6.16.6. PC[4:7]/SEG[56:53]

Each port/segment can be optioned as I/O or LCD segment

individually.

6.16.7. PD[0:4]/SEG[52:48]

Each port/segment can be optioned as I/O or LCD segment

individually.

PVDD

BOPT1 = 0

BOPT0 = 0

VDD

PVDD

BOPT1= 0

BOPT0 = 1

VDD

PVDD

BOPT0

BOPT1 = 1

BOPT0 = 0

VDD

BOPT1

PVDD

BOPT0

BOPT1 = 1

BOPT0 = 1

VDD

BOPT1

BOPT0

BOPT1

BOPT0

BOPT1

IC

PCB

IC

PCB