| 전자부품 데이터시트 검색엔진 |
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SC202FEVB 데이터시트(PDF) 14 Page - Semtech Corporation |
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SC202FEVB 데이터시트(HTML) 14 Page - Semtech Corporation |
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14 / 17 page ![]() SC202F 14 Applications Information (continued) (connected to the SNS pin) away from the LX node as shown in Figure 2 to minimize noise and magnetic interference. Minimize the resistance from the OUT and GND pins to the load. This will reduce errors in DC regulation due to voltage drops in the traces. The two smaller exposed pads on this package should not be connected to any traces. The area beneath these two pads must be kept clear so that they do not make electrical contact with any traces, including ground. 5. 6. 3.5m m C IN CT L0 CT L1 CT L3 LX (no connection needed) SN S GND IN OUT 3.8m m S C 202F be electrically connected to the P C B . C OUT Figure 2 — Recommended PCB Layout |
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