| 전자부품 데이터시트 검색엔진 |
|
SC4524FSETRT 데이터시트(PDF) 16 Page - Semtech Corporation |
|
|
|||||||||||||||||||||||||||||
SC4524FSETRT 데이터시트(HTML) 16 Page - Semtech Corporation |
|
16 / 23 page ![]() SC4524F 16 10% and 20% of the switching frequency. At F C, find the required compensator gain, A C. In typical applications with ceramic output capacitors, the ESR zero is neglected and the required compensator gain at F C can be estimated by x π x x − = O FB O C S CA C V V C F 2 1 R G 1 log 20 A (3) Place the compensator zero, F Z1, between 10% and 20% of the crossover frequency, F C. (4) Use the compensator pole, F P1, to cancel the ESR zero, F Z. (5) Then, the parameters of the compensation network can be calculated by where g m=0.3mA/V is the EA gain of the SC4524F. Example: Determine the voltage compensator for an 800kHz, 12V to 3.3V/2A converter with 22uF ceramic output capacitor. Choose a loop gain crossover frequency of 80kHz, and place voltage compensator zero and pole at F Z1=16kHz (20% of F C), and FP1=600kHz. From the equation in step (2), the required compensator gain at F C is dB 4 . 11 3 . 3 0 . 1 10 22 10 80 2 1 10 5 . 5 18.5 1 log 20 A 6 3 3 C = ⋅ ⋅ ⋅ ⋅ ⋅ π ⋅ ⋅ ⋅ ⋅ − = − − Then the compensator parameters are Select R 7=12.4k, C5=1nF, and C8=22pF for the design. Compensator parameters for various typical applications are listed in Table 5. Thermal Considerations For the power transistor inside the SC4524F, the conduction loss P C, the switching loss PSW, and bootstrap circuit loss P BST, can be estimated as follows: O CESAT C I V D P × × = SW O IN S SW F I V t 2 1 P × × × × = 40 I V D P O BST BST × × = whereV BST is the BST supply voltage and tS is the equivalent switching time of the NPN transistor (see Table 4). Table 4. Typical switching time Input Voltage Load Current 1A 2A 12V 12.5ns 15.3ns In addition, the quiescent current loss is 2mA V P IN Q × = The total power loss of the SC4524F is therefore Q BST SW C TOTAL P P P P P = + + = The temperature rise of the SC4524F is the product of the total power dissipation (see previous equation) and q JA (36oC/W), which is the thermal impedance from junction to ambient for the SOIC-8 EDP package. It is not recommended to operate the SC4524F above 125oC junction temperature. In the applications with high input voltage and high output current, the switching frequency may need to be reduced to meet the thermal requirement. Applications Information (Cont.) m 7 g 10 R 20 C A = 7 Z1 5 R F π 2 1 C = 7 P1 8 R F π 2 1 C = 12.4k 10 3 0. 10 R 3 7 20 11.4 = × = − nF 8 . 0 10 4 . 12 10 16 2π 1 C 3 3 5 = × × × × = 21pF 10 4 . 12 10 600 π 2 1 C 3 3 8 = × × × × = |
|
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |