| 전자부품 데이터시트 검색엔진 |
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AW32809CSR 데이터시트(PDF) 13 Page - Shanghai awinic technology co.,ltd |
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AW32809CSR 데이터시트(HTML) 13 Page - Shanghai awinic technology co.,ltd |
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13 / 20 page ![]() AW32801/AW32805/ AW32809/AW32812 Feb. 2018 V1.1 www.awinic.com.cn 13 Copyright © 2014 SHANGHAI AWINIC TECHNOLOGY CO., LTD PCB LAYOUT CONSIDERATION To make full use of the performance of AW328XX, the guidelines below should be followed. 1. All the peripherals should be placed as close to the device as possible. Place the input capacitor CIN on the top layer (same layer as the AW328XX) and close to IN pin, and place the output capacitor COUT on the top layer (same layer as the AW328XX) and close to OUT pin. 2. Red bold paths on figure 4 and 5 are power lines that will flow large current, please route them on PCB as straight, wide and short as possible. 3. If R1 and R2 are used, route OVLO line on PCB as short as possible to reduce parasitic capacitance. 4. The power trace from USB connector to AW328XX may suffer from ESD event, keep other traces away from it to minimize possible EMI and ESD coupling. 5. Use rounded corners on the power trace from USB connector to AW328XX to decrease EMI coupling. |
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