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GD25LB128DSJS 데이터시트(PDF) 22 Page - GigaDevice Semiconductor (Beijing) Inc.

부품명 GD25LB128DSJS
상세설명  1.8V Uniform Sector Dual and Quad Serial Flash
PDF  75 Pages
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제조업체  GIGADEVICE [GigaDevice Semiconductor (Beijing) Inc.]
홈페이지  http://www.gigadevice.com/
Logo GIGADEVICE - GigaDevice Semiconductor (Beijing) Inc.

GD25LB128DSJS 데이터시트(HTML) 22 Page - GigaDevice Semiconductor (Beijing) Inc.

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1.8V Uniform Sector
Dual and Quad Serial Flash
GD25LB128D
22
Figure6a. Write Status Register Sequence Diagram (QPI)
CS#
SCLK
IO0
IO1
IO2
IO3
0
1
2
3
4
5
Command
01H
4
12
0
8
5
13
1
9
14
10
7
3
15
11
Status Register in
6
2
7.6. Read Data Bytes (READ) (03H)
The Read Data Bytes (READ) command is followed by a 3-byte address (A23-A0), and each bit is latched-in on the
rising edge of SCLK. Then the memory content, at that address, is shifted out on SO, and each bit is shifted out, at a Max
frequency fR, on the falling edge of SCLK. The first byte addressed can be at any location. The address is automatically
incremented to the next higher address after each byte of data is shifted out. The whole memory can, therefore, be read
with a single Read Data Bytes (READ) command. Any Read Data Bytes (READ) command, while an Erase, Program or
Write cycle is in progress, is rejected without having any effects on the cycle that is in progress.
Figure7. Read Data Bytes Sequence Diagram
Command
0
1
2
3
4
5
6
7
03H
CS#
SCLK
SI
SO
High-Z
8
9 10
28 29 30 31 32
MSB
3
2
1
0
34 35 36 37
33
23 22 21
7
6
5
4
3
2
1
0
38 39
24-bit address
MSB
Data Out1
Data Out2



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