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GD25LE256DFJS 데이터시트(PDF) 26 Page - GigaDevice Semiconductor (Beijing) Inc.

부품명 GD25LE256DFJS
상세설명  1.8V Uniform Sector Dual and Quad Serial Flash
PDF  83 Pages
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제조업체  GIGADEVICE [GigaDevice Semiconductor (Beijing) Inc.]
홈페이지  http://www.gigadevice.com/
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1.8V Uniform Sector
Dual and Quad Serial Flash
GD25LE256D
26
7.9.
Read Data Bytes at Higher Speed (Fast Read) (0BH)
The Read Data Bytes at Higher Speed (Fast Read) command is for quickly reading data out. It is followed by a 3-byte
address (A23-A0) or a 4-byte address (A31-A0) and a dummy byte, and each bit is latched-in on the rising edge of SCLK.
Then the memory content, at that address, is shifted out on SO, and each bit is shifted out, at a Max frequency fC, on the
falling edge of SCLK. The first byte addressed can be at any location. The address is automatically incremented to the next
higher address after each byte of data is shifted out. The default read mode is 3-byte address mode, and the lower 128Mbit
can be read with a single Read Data Byte at Higher Speed (0BH) command. By entering 4-byte address mode, or to set
EN4B (S11) bit to 1, the higher 128Mbit can be read with a single Read Data Byte at Higher Speed (0BH) command.
Figure10. Read Data Bytes at Higher Speed Sequence Diagram
Command
0
1
2
3
4
5
6
7
0BH
CS#
SCLK
SI
SO
High-Z
8
9 10
28 29 30 31
3
2
1
0
23 22 21
24-bit address
MSB
34 35 36 37
33
6
5
4
3
2
1
0
38 39
Data Out1
32
42 43 44 45
41
46 47
40
7
6
5
4
3
2
1
0
7
6
5
7
Data Out2
CS#
SCLK
SI
SO
MSB
Dummy Byte
Note: The device default is in 24-bit address mode. For 4-byte mode, the address length becomes 32-bit.



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