UPD17P133CS datasheet(6/289 Pages) NEC

6 / 289 page

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TABLE OF CONTENTS

CHAPTER 1 GENERAL .....................................................................................................................

1.1

FUNCTION LIST ................................................................................................................

1.2

ORDERING INFORMATION .............................................................................................

1.3

BLOCK DIAGRAM .............................................................................................................

1.4

PIN CONFIGURATION (Top View) .................................................................................

CHAPTER 2 PIN FUNCTIONS .........................................................................................................

2.1

PIN FUNCTIONS ...............................................................................................................

2.1.1

Pins in Normal Operation Mode .........................................................................................

2.1.2

Pins in Program Memory Write/Verify Mode ...

µPD17P132, 17P133 only .....................

2.2

PIN INPUT/OUTPUT CIRCUIT .........................................................................................

2.3

HANDLING UNUSED PINS ..............................................................................................

2.4

CAUTIONS ON USE OF THE RESET AND INT PINS

(in Normal Operation Mode only) .................................................................................

CHAPTER 3 PROGRAM COUNTER (PC) .......................................................................................

3.1

PROGRAM COUNTER CONFIGURATION ......................................................................

3.2

PROGRAM COUNTER OPERATION ................................................................................

3.2.1

Program Counter at Reset ..................................................................................................

3.2.2

Program Counter during Execution of the Branch Instruction (BR) ..................................

3.2.3

Program Counter during Execution of Subroutine Calls (CALL) .......................................

3.2.4

Program Counter during Execution of Return Instructions (RET, RETSK, RETI) .............

3.2.5

Program Counter during Table Reference (MOVT) ............................................................

3.2.6

Program Counter during Execution of Skip Instructions

(SKE, SKGE, SKLT, SKNE, SKT SKF) ..................................................................................

3.2.7

Program Counter When an Interrupt Is Received .............................................................

3.3

CAUTIONS ON PROGRAM COUNTER OPERATION ....................................................

CHAPTER 4 PROGRAM MEMORY (ROM) ....................................................................................

4.1

PROGRAM MEMORY CONFIGURATION .......................................................................

4.2

PROGRAM MEMORY USAGE .........................................................................................

4.2.1

Flow of the Program ...........................................................................................................

4.2.2

Table Reference ..................................................................................................................

CHAPTER 5 DATA MEMORY (RAM) .............................................................................................

5.1

DATA MEMORY CONFIGURATION ................................................................................

5.1.1

System Register (SYSREG) .................................................................................................

5.1.2

Data Buffer (DBF) ................................................................................................................

5.1.3

General Register (GR) .........................................................................................................

5.1.4

Port Registers ......................................................................................................................

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