T25S16AFEPR datasheet(61/74 Pages) HMSEMI

61 / 74 page

Figure 7.37b Individual Block/Sector Unlock Instruction(QPI Mode)

7.5.11 Read Block/Sector Lock (3Dh)

The Individual Block/Sector Lock provides an alternative way to protect the memory array from adverse

Erase/Program. In order to use the Individual Block/Sector Locks, the WPS bit in Status Register-3 must be

set to 1. If WPS=0, the write protection will be determined by the combination of CMP, SEC, TB, BP[2:0] bits in

the Status Registers. The Individual Block/Sector Lock bits are volatile bits. The default values after device

power up or after a Reset are 1, so the entire memory array is being protected.

To read out the lock bit value of a specific block or sector as illustrated in Figure 6.2, a Read Block/Sector

Lock command must be issued by driving CS# low, shifting the instruction code “3Dh” into the Data Input (DI)

pin on the rising edge of CLK, followed by a 24-bit address. The Block/Sector Lock bit value will be shifted out

on the DO pin at the falling edge of CLK with most significant bit (MSB) first as shown in Figure7.38. If the

least significant bit (LSB) is 1, the corresponding block/sector is locked; if LSB=0, the corresponding

block/sector is unlocked, Erase/Program operation can be performed.

Figure 7.38a Read Block Lock Instruction(SPI Mode)

Figure 7.38b Read Block Lock Instruction(QPI Mode)

7.5.12 Global Block/Sector Lock (7Eh)

All Block/Sector Lock bits can be set to 1 by the Global Block/Sector Lock instruction. The command

must be issued by driving CS# low, shifting the instruction code “7Eh” into the Data Input (DI) pin on the rising

edge of CLK, and then driving CS# high. A Write Enable instruction must be executed before the device will

accept the Global Block/Sector Lock Instruction (Status Register bit WEL=1).

HM25Q128A

T25S16AFEPR 데이터시트(PDF) 61 Page - Shenzhen Huazhimei Semiconductor Co., Ltd