ADuCM330WFS/ADuCM331WFS

Data Sheet

Rev. A | Page 16 of 17

APPLICATIONS INFORMATION

DESIGN GUIDELINES

Before starting design and layout of the ADuCM330WFS/

ADuCM331WFS on a PCB, it is recommended that the

designer become familiar with the following guidelines that

describe any special circuit considerations and layout

requirements needed.

POWER AND GROUND RECOMMENDATIONS

Place capacitors that are connecting to the ADuCM330WFS/

ADuCM331WFS as close to the pins of the device as possible,

with minimal trace length.

Capacitors connected to the 33VDD, AVDD18, and DVDD18

pins must have a low equivalent series resistance (ESR) rating.

All components must be rated accordingly to the temperature

range expected by the application.

EXPOSED PAD THERMAL RECOMMENDATIONS

It is required that the exposed pad on the underside of the

ADuCM330WFS/ADuCM331WFS be connected to ground to

achieve the best electrical and thermal performance. It is recom-

mended that the user connect an exposed continuous copper

plane on the PCB to the ADuCM330WFS/ADuCM331WFS

exposed pad, and that the copper plane have several vias to

achieve the lowest possible resistive thermal path for heat

dissipation to flow through the bottom of the PCB. It is

recommended that these vias be solder filled or plugged.

GENERAL RECOMMENDATIONS

It is highly recommended to use the schematic given with the

component values shown in Figure 3. The component values

shown in Figure 3 were chosen from the characterization tests

and evaluated for optimum performance of the ADuCM330WFS/

ADuCM331WFS.

Configure the GPIOs as inputs with pull-up resistors enabled to

obtain the lowest possible current consumption in shutdown mode.

Set the Cortex-M3 core clock speed to the minimum required

to meet the application requirements.

*LIN 2.2 PHYSICAL TEST PASSED WITH 220pF CAPACITOR.

27

26

12

13

31

33

29

30

23

18

24

25

10µF

10nF

100nF

100nF

100nF

10nF

1nF

10nF

IIN–

14

IIN–_AUX

11

IIN+_AUX

17

VREF

15

VINP_AUX

16

VINM_AUX

IIN+

100µΩ

SHUNT

VBAT

VDD

VBAT

4

5

6

7

8

32

2

3

10

AVDD18

VTEMP

9

GND_SW

20

28

1

33VDD

21

DVDD33

LIN

RESET

DVDD33

1µF

*

22

DVDD18

0.47µF

0.47µF

19

AVDD18

100nF

1kΩ

ELECTRONIC

CONTROL

UNIT

MASTER

LIN BUS ESD

PROTECTION DIODE

PESD1LIN (optional)

LIN

220Ω

100kΩ

220Ω

1kΩ

10kΩ

NTC

0.47µF

ADuCM330WFS/

ADuCM331WFS

OPTIONAL

Figure 3. External Components Recommended for Proper Operation