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AX88655AB 데이터시트(PDF) 13 Page - ASIX Electronics Corporation |
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AX88655AB 데이터시트(HTML) 13 Page - ASIX Electronics Corporation |
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13 / 33 page ![]() ASIX ELECTRONICS CORPORATION 13 AX88655AB 5-Port 10/100/1000BASE-T Ethernet Switch CONFIDENTIAL 4.0 Register Descriptions Register Tables Summary: Address 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Default 00 H RESERVED RESERVED 0000 H 01 H RESERVED RESERVED FFFF H 02 H RESERVED + RxFlowCtrl[4:0] RESERVED + TxFlowCtrl[4:0] 0000 H 03 H RESERVED RESERVED 00FF H 04 H RESERVED RESERVED 00FF H 05 H RESERVED 0000 H 06 H RESERVED RESERVED 00FF H 07 H RESERVED RESERVED 1215 H 08 H RESERVED RESERVED RESERVED RESERVED 7777 H 09 H RESERVED RESERVED RESERVED RESERVED 7777 H 0A H PortPair1[4:0] PortPair0[4:0] 0000 H 0B H PortPair3[4:0] PortPair2[4:0] 0000 H 0C H LowQueueWeight[3:0] RESERVE D lw_LowQueueDiscardLimit [9:0] 1060 H 0D H HighQueueWeight[3:0] MaxStorm[1:0] lw_HighQueueDiscardLimit [9:0] 1060 H 0E H RES PTO RES MPS[1:0] SR SP NSB RES 51TE RES QoS[1:0] AE HM DB 8880 H 0F H RESERVED MaxAge[8:0] 1865 H 10 H Trunk47[2:0] Trunk30[2:0] RESERVED 00C0 H 11 H RES RES RESERVED LowQueueFlowCtrlMark[9:0] 0010 H 12 H MaxJam[5:0] HighQueueFlowCtrlMark[9:0] 2810 H 13 H RESERVED hw_LowQueueDiscardLimit[9:0] 0070 H 14 H RES SmartFC [1:0] RES RESERV ED hw_HighQueueDiscardLimit[9:0] 0070 H 15 H Port-based VLAN Group #1 Port-based VLAN Group #0 0000 H 16 H Port-based VLAN Group #3 Port-based VLAN Group #2 0000 H 17 H RESERVED Port-based VLAN Group #4 0000 H 18 H RESERVED RESERVED 0000 H 19 H ResolutionIngress Port 1[7:0] ResolutionIngress Port 0[7:0] FFFF H 1A H ResolutionIngress Port 3[7:0] ResolutionIngress Port 2[7:0] FFFF H 1B H RESERVED ResolutionIngress Port 4[7:0] FFFF H 1C H RESERVED RESERVED FFFF H 1D H iso rm MirrorPort[2:0] PortMirrorEn[ 1:0] IngressMode ResolutionEngress Port 7[7:0] 00FF H 1E H RESERVED + UpdateSaForSecurity[4:0] RESERVED + OneSaSecurityMode[4:0] 0000 H 1F H GCLK125MHz_Dly1ns_n[7:0] TargetPort[2:0] JumboLeng13_10[3:0] JumboEnable 0000 H Note: 1. The word “Reserved” = “Res.” on the above table. 2. Care must be taken that the “Reserved” registers should keep the default value always. Change of any reserved value may be resulting in unpredictable conditions. 3. The registers can be accessed by internal MPU only. The MPU will read in configuration table, located on EEPROM at somewhere address, and programs the above registers when every time power on or after system reset. 4. Basically, the registers can be accessed with the same data format as station management (similar to MDC and MDIO) via ADC and ADIO pins. ] |
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