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VN1306 데이터시트(PDF) 1 Page - Supertex, Inc |
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VN1306 데이터시트(HTML) 1 Page - Supertex, Inc |
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1 / 4 page ![]() 7-191 7 VN1304 VN1306 VN1310 N-Channel Enhancement-Mode Vertical DMOS FETs BV DSS /RDS(ON) I D(ON) Order Number / Package BV DGS (max) (min) TO-39 TO-92 40V 8.0 Ω 0.5A — — 60V 8.0 Ω 0.5A VN1306N2 — 100V 8.0 Ω 0.5A — VN1310N3 Advanced DMOS Technology These enhancement-mode (normally-off) transistors utilize a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This combination produces devices with the power handling capabilities of bipolar transistors and with the high input impedance and positive temperature coefficient inher- ent in MOS devices. Characteristic of all MOS structures, these devices are free from thermal runaway and thermally-induced secondary breakdown. Supertex’s vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. Note: See Package Outline section for dimensions. Package Options Features Free from secondary breakdown Low power drive requirement Ease of paralleling Low CISS and fast switching speeds Excellent thermal stability Integral Source-Drain diode High input impedance and high gain Complementary N- and P-channel devices Applications Motor controls Converters Amplifiers Switches Power supply circuits Drivers (relays, hammers, solenoids, lamps, memories, displays, bipolar transistors, etc.) Absolute Maximum Ratings Drain-to-Source Voltage BV DSS Drain-to-Gate Voltage BV DGS Gate-to-Source Voltage ± 20V Operating and Storage Temperature -55 °C to +150°C Soldering Temperature* 300 °C * Distance of 1.6 mm from case for 10 seconds. S G D D G S TO-39 TO-92 Ordering Information Case: DRAIN |
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