SST49LF080A datasheet(28/49 Pages) SST

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Data Sheet

8 Mbit LPC Flash

SST49LF080A

S71235-00-000

4/03

DC Characteristics

TABLE 12: DC OPERATING CHARACTERISTICS (ALL INTERFACES)

Symbol

Parameter

Limits

Test Conditions

Min

Max

Units

IDD1

1. IDD active while a Read or Write (Program or Erase) operation is in progress.

Active VDD Current

LCLK (LPC mode) and Address Input (PP mode)=VILT/VIHT

at f=33 MHz (LPC mode) or 1/TRC min (PP Mode)

All other inputs=VIL or VIH

Read

All outputs = open, VDD=VDD Max

Write

See Note2

2. For PP Mode: OE# = WE# =

VIH; For LPC Mode: f = 1/TRC min, LFRAME# = VIH, CE# = VIL.

ISB

Standby VDD Current

(LPC Interface)

100

µA

LCLK (LPC mode) and Address Input (PP mode)=VILT/VIHT

at f=33 MHz (LPC mode) or 1/TRC min (PP Mode)

LFRAME#=0.9 VDD, f=33 MHz, CE#=0.9 VDD,

VDD=VDD Max, All other inputs ≥ 0.9 VDD or ≤0.1 VDD

IRY3

3. The device is in Ready mode when no activity is on the LPC bus.

Ready Mode VDD Current

(LPC Interface)

LCLK (LPC mode) and Address Input (PP mode)=VILT/VIHT

at f=33 MHz (LPC mode) or 1/TRC min (PP Mode)

LFRAME#=VIL, f=33 MHz, VDD=VDD Max

All other inputs

≥ 0.9 VDD or ≤0.1 VDD

Input Current for Mode

and ID[3:0] pins

200

µA

VIN=GND to VDD, VDD=VDD Max

ILI

Input Leakage Current

µA

VIN=GND to VDD, VDD=VDD Max

ILO

Output Leakage Current

µA

VOUT=GND to VDD, VDD=VDD Max

VIHI

INIT# Input High Voltage

1.1

VDD+0.5

VDD=VDD Max

VILI

INIT# Input Low Voltage

-0.5

0.4

VDD=VDD Min

VIL

Input Low Voltage

-0.5

0.3 VDD

VVDD=VDD Min

VIH

Input High Voltage

0.5 VDD

VDD+0.5

VDD=VDD Max

VOL

Output Low Voltage

0.1 VDD

VIOL=1500 µA, VDD=VDD Min

VOH

Output High Voltage

0.9 VDD

VIOH=-500 µA, VDD=VDD Min

T12.0 1235

TABLE 13: RECOMMENDED SYSTEM POWER-UP TIMINGS

Symbol

Parameter

Minimum

Units

TPU-READ1

1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter

Power-up to Read Operation

100

µs

TPU-WRITE1

Power-up to Write Operation

100

µs

T13.0 1235

TABLE 14: PIN CAPACITANCE (VDD=3.3V, Ta=25 °C, f=1 Mhz, other pins open)

Parameter

Description

Test Condition

Maximum

CI/O1

1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.

I/O Pin Capacitance

VI/O=0V

12 pF

CIN1

Input Capacitance

VIN=0V

12 pF

T14.0 1235

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