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74LVC1G125 데이터시트(PDF) 2 Page - Silicon Supplies |
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74LVC1G125 데이터시트(HTML) 2 Page - Silicon Supplies |
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2 / 8 page ![]() Page 2 of 8 www.siliconsupplies.com Low Voltage CMOS Logic – 74LVC1G125 Rev 1.0 29/06/19 Logic Diagram Expanded Logic Diagram Pad Layout and Functions OE A Y OE A Y INPUTS OUTPUT A OE Y H L X L L H H L Z H = High level (steady state) L = Low level (steady state) Z = High Impedance X = Don’t care Truth Table COORDINATES (µm) PAD FUNCTION X Y 1 OE -178 130 2 VCC -51 -130 3 Y 180 -130 4 GND 178.1 130 5 A 14 130 CONNECT CHIP BACK TO VCC OR FLOAT 590µm (23.23 mils) 0,0 1 5 4 2 3 DIE ID |
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