| 전자부품 데이터시트 검색엔진 |
|
AMC1336 데이터시트(PDF) 13 Page - Texas Instruments |
|
|
|
|||||||||||||||||||||||||||||
AMC1336 데이터시트(HTML) 13 Page - Texas Instruments |
|
13 / 31 page ![]() V IN Integrator 1 Integrator 2 0 V DAC V 1 V 2 V 4 V 5 V 3 CMP f CLKIN 3 2 1 0 -1 -2 3.25 3.5 3.75 4 4.25 5.5 VDD (V) 3 4.5 5 4 Specified VCM Range VCMov VCMuv 3 2 1 0 -1 -2 3.25 3.5 3.75 4 4.25 5.5 VDD (V) 3 4.5 5 4 VCMov VCMuv Specified VCM Range 13 AMC1336 www.ti.com SBAS951 – AUGUST 2019 Product Folder Links: AMC1336 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated Feature Description (continued) Figure 7. Common-Mode Input Voltage Range With a Full-Scale Differential Input Signal of ±1.25 V Figure 8. Common-Mode Input Voltage Range With a Zero Differential Input Signal There are two restrictions on the analog input signals (AINP and AINN). First, if the input voltage exceeds the range AGND – 5 V to AVDD + 0.5 V, the input current must be limited to 10 mA because the device input electrostatic discharge (ESD) diodes turn on. In addition, the linearity and noise performance of the device are ensured only when the differential analog input voltage remains within the specified linear full-scale range (FSR) and within the specified input common-mode range. 7.3.2 Modulator The modulator implemented in the AMC1336, as conceptualized in Figure 9, is a second-order, switched- capacitor, feed-forward ΔΣ modulator. The analog input voltage VIN and the output V5 of the 1-bit digital-to-analog converter (DAC) are differentiated, providing an analog voltage V1 at the input of the first integrator stage. The output of the first integrator feeds the input of the second integrator stage, resulting in an output voltage V3 that is differentiated with the input signal VIN and the output of the first integrator V2. Depending on the polarity of the resulting voltage V4, the output of the comparator is changed. In this case, the 1-bit DAC responds on the next clock pulse by changing the associated analog output voltage V5, causing the integrators to progress in the opposite direction and forcing the value of the integrator output to track the average value of the input. Figure 9. Block Diagram of a Second-Order Modulator |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |